scholarly journals Effect of High-Temperature Annealing on Ion-Implanted Silicon Solar Cells

2012 ◽  
Vol 2012 ◽  
pp. 1-6 ◽  
Author(s):  
Hyunpil Boo ◽  
Jong-Han Lee ◽  
Min Gu Kang ◽  
KyungDong Lee ◽  
Seongtak Kim ◽  
...  
Keyword(s):  
Solar Cells ◽  
High Temperature ◽  
Annealing Temperature ◽  
Silicon Solar Cells ◽  
High Temperature Annealing ◽  
Abrupt Decrease ◽  
Simulation Based ◽  
P Type ◽  
Pc1d Simulation ◽  
Ion Implanted

P-type and n-type wafers were implanted with phosphorus and boron, respectively, for emitter formation and were annealed subsequently at 950∼1050∘Cfor 30∼90 min for activation. Boron emitters were activated at1000∘Cor higher, while phosphorus emitters were activated at950∘C. QSSPC measurements show that the impliedVocof boron emitters increases about 15 mV and theJ01decreases by deep junction annealing even after the activation due to the reduced recombination in the emitter. However, for phosphorus emitters the impliedVocdecreases from 622 mV to 560 mV and theJ01increases with deep junction annealing. This is due to the abrupt decrease in the bulk lifetime of the p-type wafer itself from 178 μs to 14 μs. PC1D simulation based on these results shows that, for p-type implanted solar cells, increasing the annealing temperature and time abruptly decreases the efficiency (Δηabs=−1.3%), while, for n-type implanted solar cells, deep junction annealing increases the efficiency andVoc, especially (Δηabs=+0.4%) for backside emitter solar cells.

Correlation Study of Morphology, Electrical Activation and Contact formation of Ion Implanted 4H-SiC

2009 ◽  
Vol 156-158 ◽  
pp. 493-498
Author(s):  
Ming Hung Weng ◽  
Fabrizio Roccaforte ◽  
Filippo Giannazzo ◽  
Salvatore di Franco ◽  
Corrado Bongiorno ◽  
...  
Keyword(s):  
High Temperature ◽  
Surface Morphology ◽  
Electrical Activation ◽  
Structural Defects ◽  
High Resistivity ◽  
Al Alloy ◽  
High Temperature Annealing ◽  
Capping Layer ◽  
P Type ◽  
Ion Implanted

This paper reports a detailed study of the electrical activation and the surface morphology of 4H-SiC implanted with different doping ions (P for n-type doping and Al for p-type doping) and annealed at high temperature (1650–1700 °C) under different surface conditions (with or without a graphite capping layer). The combined use of atomic force microscopy (AFM), transmission electron microscopy (TEM), and scanning capacitance microscopy (SCM) allowed to clarify the crucial role played by the implant damage both in evolution of 4H-SiC surface roughness and in the electrical activation of dopants after annealing. The high density of broken bonds by the implant makes surface atoms highly mobile and a peculiar step bunching on the surface is formed during high temperature annealing. This roughness can be minimized by using a capping layer. Furthermore, residual lattice defects or precipitates were found in high dose implanted layers even after high temperature annealing. Those defects adversely affect the electrical activation, especially in the case of Al implantation. Finally, the electrical properties of Ni and Ti/Al alloy contacts on n-type and p-type implanted regions of 4H-SiC were studied. Ohmic behavior was observed for contacts on the P implanted area, whilst high resistivity was obtained in the Al implanted layer. Results showed a correlation of the electrical behavior of contacts with surface morphology, electrical activation and structural defects in ion-implanted, particularly, Al doped layer of 4H-SiC.

scholarly journals Simulation-based roadmap for the integration of poly-silicon on oxide contacts into screen-printed crystalline silicon solar cells

2021 ◽  
Vol 11 (1) ◽  
Author(s):  
Christian N. Kruse ◽  
Sören Schäfer ◽  
Felix Haase ◽  
Verena Mertens ◽  
Henning Schulte-Huxel ◽  
...  
Keyword(s):  
Solar Cells ◽  
High Efficiency ◽  
Crystalline Silicon ◽  
Silicon Solar Cells ◽  
Efficiency Gain ◽  
Reference Case ◽  
Crystalline Silicon Solar Cells ◽  
Simulation Based ◽  
P Type ◽  
Screen Printed

AbstractWe present a simulation-based study for identifying promising cell structures, which integrate poly-Si on oxide junctions into industrial crystalline silicon solar cells. The simulations use best-case measured input parameters to determine efficiency potentials. We also discuss the main challenges of industrially processing these structures. We find that structures based on p-type wafers in which the phosphorus diffusion is replaced by an n-type poly-Si on oxide junction (POLO) in combination with the conventional screen-printed and fired Al contacts show a high efficiency potential. The efficiency gains in comparsion to the 23.7% efficiency simulated for the PERC reference case are 1.0% for the POLO BJ (back junction) structure and 1.8% for the POLO IBC (interdigitated back contact) structure. The POLO BJ and the POLO IBC cells can be processed with lean process flows, which are built on major steps of the PERC process such as the screen-printed Al contacts and the $$\text{Al}_\text{2 }\text{O}_\text{3 }/\text{SiN }$$ Al 2 O 3 / SiN passivation. Cell concepts with contacts using poly-Si for both polarities ($$\text{POLO}^2$$ POLO 2 -concepts) show an even higher efficiency gain potential of 1.3% for a $$\text{POLO}^2$$ POLO 2 BJ cell and 2.2% for a $$\text{POLO}^2$$ POLO 2 IBC cell in comparison to PERC. For these structures further research on poly-Si structuring and screen-printing on p-type poly-Si is necessary.

Effect of Surface Orientation and Off-Angle on Surface Roughness and Electrical Properties of p-Type Impurity Implanted 4H-SiC Substrate after High Temperature Annealing

2006 ◽  
Vol 527-529 ◽  
pp. 835-838 ◽  
Author(s):  
Akimasa Kinoshita ◽  
Makoto Katou ◽  
Miwa Kawasaki ◽  
Kazutoshi Kojima ◽  
Kenji Fukuda ◽  
...  
Keyword(s):  
Surface Roughness ◽  
High Temperature ◽  
Annealing Temperature ◽  
Surface Orientation ◽  
Free Carrier ◽  
Root Mean Square Roughness ◽  
Mean Square ◽  
High Temperature Annealing ◽  
P Type ◽  
Effect Of Surface

We investigate the effect of surface orientation and off-angle for Al-implanted 4H-SiC samples after high temperature annealing. The samples are obtained from a 4H-SiC (0001) substrate 8° off-angled (Si-face 8°off), and (000-1) substrates 8° (C-face 8°off), 4° (C-face 4°off) and less than 1° off-angled (C-face ~1°off). An n-type epitaxial layer is deposited on all substrates. Multiple implantations of Al+ (30~200keV) are carried out at 600°C. The total dose is 8.6 × 1015 cm-2. The Al-implanted samples are annealed in Ar ambient at 1580°C, 1700°C and 1800°C for 30s using the hybrid super rapid thermal annealing (HS-RTA) equipment. In this study, sheet resistance (Rs), free carrier concentration (Ns), Hall mobility (μ) and root-mean square roughness (Rrms) are used to evaluate the Al-implanted samples after high temperature annealing. Rs for all Al-implanted samples after annealing at 1800°C for 30s is around 18k/. Rrms for the Al-implanted C-face samples after annealing at 1800°C increases with increasing off-angle. Rrms for the Al-implanted Si-face 8°off sample after annealing increases with annealing temperature. Rrms for the C-face ~1°off Al-implanted sample after annealing at 1800°C is lower than that for the Si-face 8°off Al-implanted sample after annealing at 1700°C, moreover Rs for the C-face ~1°off sample after annealing at 1800°C is about 10% of that for the Si-face 8°off Al-implanted sample after annealing at 1700°C. It is shown that the C-face ~1°off sample is useful to fabricate a p+ region with low Rs and low Rrms. If C-face 4H-SiC is used to fabricate devices, devices made on C-face 4H-SiC with low off angle are expected to decrease any problems caused by increase of surface roughness after high temperature annealing (~1800°C).

scholarly journals Влияние температуры отжига на электрически активные центры в кремнии, имплантированном ионами германия

2019 ◽  
Vol 53 (2) ◽  
pp. 161
Author(s):  
Н.А. Соболев ◽  
О.В. Александров ◽  
В.И. Сахаров ◽  
И.Т. Серенков ◽  
Е.И. Шек ◽  
...  
Keyword(s):  
High Temperature ◽  
Single Crystal ◽  
Annealing Temperature ◽  
Single Crystal Silicon ◽  
High Temperature Annealing ◽  
Crystal Silicon ◽  
Type Silicon ◽  
Special Distribution ◽  
P Type

AbstractThe implantation of Czochralski-grown p -type silicon with 1-MeV germanium ions at a dose of 2 . 5 × 10^14 cm^–2 does not lead to the amorphization of single-crystal silicon. Under subsequent high-temperature annealing, electrically active acceptor centers are transformed. Their concentration and special distribution depend on the annealing temperature. The possible factors determining how these centers are formed are discussed.

Defect reduction in oxygen implanted silicon-on-insulator material during high-temperature annealing

1989 ◽  
Vol 47 ◽  
pp. 604-605
Author(s):  
P. Roitman ◽  
B. Cordts ◽  
S. Visitserngtrakul ◽  
S.J. Krause
Keyword(s):  
High Temperature ◽  
Annealing Temperature ◽  
Silicon On Insulator ◽  
High Dose ◽  
High Temperature Annealing ◽  
High Current ◽  
Defect Reduction ◽  
Annealing Step ◽  
Multiple Cycle ◽  
Defect Densities

Synthesis of a thin, buried dielectric layer to form a silicon-on-insulator (SOI) material by high dose oxygen implantation (SIMOX – Separation by IMplanted Oxygen) is becoming an important technology due to the advent of high current (200 mA) oxygen implanters. Recently, reductions in defect densities from 109 cm−2 down to 107 cm−2 or less have been reported. They were achieved with a final high temperature annealing step (1300°C – 1400°C) in conjunction with: a) high temperature implantation or; b) channeling implantation or; c) multiple cycle implantation. However, the processes and conditions for reduction and elimination of precipitates and defects during high temperature annealing are not well understood. In this work we have studied the effect of annealing temperature on defect and precipitate reduction for SIMOX samples which were processed first with high temperature, high current implantation followed by high temperature annealing.

Liquid-Phase Crystallized Silicon Solar Cells on Glass: Increasing the Open-Circuit Voltage by Optimized Interlayers for n- and p-Type Absorbers

2015 ◽  
Vol 5 (6) ◽  
pp. 1757-1761 ◽  
Author(s):  
Daniel Amkreutz ◽  
William D. Barker ◽  
Sven Kuhnapfel ◽  
Paul Sonntag ◽  
Onno Gabriel ◽  
...  
Keyword(s):  
Solar Cells ◽  
Liquid Phase ◽  
Open Circuit Voltage ◽  
Open Circuit ◽  
Silicon Solar Cells ◽  
P Type

High-temperature annealing effects on molybdenum–silicon contact substrate for vertically structured silicon quantum-dot solar cells

2018 ◽  
Vol 9 (2) ◽  
pp. 135-142
Author(s):  
Xuguang Jia ◽  
Ziyun Lin ◽  
Terry Chien-Jen Yang ◽  
Tian Zhang ◽  
Binesh Puthen-Veettil ◽  
...  
Keyword(s):  
Solar Cells ◽  
High Temperature ◽  
Quantum Dot ◽  
High Temperature Annealing ◽  
Silicon Quantum Dot ◽  
Quantum Dot Solar Cells ◽  
Annealing Effects
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