Capacitor Voltage Balancing of Five Level Diode Clamped Converter based STATCOM

Author(s):  
D. Sindhuja ◽  
V. Yuvaraju M.E.

<p>The power quality determines the fitness of the electrical power to the consumer devices. To improve the quality of the power delivered many compensating devices are used. The FACTS devices are normally used to reduce the power quality problems by inducing one or more AC transmission parameters. The static synchronous compensator (STATCOM) can act as either a source or sink of reactive AC power to an electricity network. The basic electronic block of the STATCOM is the voltage-source inverter that converts an input dc voltage into a three-phase output voltage. The STATCOM employs an inverter in order to obtain the voltage source of adjustable magnitude and phase from the DC link voltage on the capacitor. In this model, the STATCOM is designed with the five level diode clamped converter (DCC) controlled by space vector pulse width modulation (SVPWM) technique. The space vector technique with α, β frame is referred here. The dc link capacitor voltage equalization for the five level diode clamped converter was explained. The Total Harmonic Distortion of the source current will be considerably reduced.</p>

Author(s):  
Haider Muhamad Husen

Recent power distribution networks comprise abundant sensitive loads, which extremely impact the power quality of source in electrical power networks. Voltage dip, voltage rise, imbalanced voltage, line notching and distortion of harmonics are problems of power quality frequently take place. Pre-disturbance voltage compensation strategy and phase-locked-loop (PLL) based dq- space vector control are presented to improve a Dynamic Voltage Restorer (DVR), which restore the magnitude of voltage disturbance and displacement of phase angle to prior of voltage disturbance. 3-phase Multilevel strategy of Space Vector Pulse Width Modulation (MSVPWM) based- Multilevel Diode Clamped Converter (MDCC) is proposed as switching pulse signals employed low frequency, which creates high levels of voltage and fewer harmonics in the output waveform in comparison to 2-level SVPWM based- DVR. 3-level SVPWM based- DVR under balanced and imbalanced distortion voltage disturbances included sags and swells injected appreciated quantities of voltage, thereby attained ideal sinusoidal waveform with lower Total Harmonic Distortion THD% compared to 2-level SVPWM based- DVR. Furthermore, real and imaginary powers balanced effectively at sensitive load during various distortion voltage disturbance conditions via presented work. The proposed simulation model of multi-level SVPWM based- DVR is implemented by dedicating the software system of MATLAB/SIMULINK. The results of simulation exhibit the effectiveness and efficiency of the presented work under different distortion voltage disturbance conditions.


Author(s):  
Shalini Vashishtha ◽  
K.R. Rekha

Since last decades, the pulse width modulation (PWM) techniques have been an intensive research subject. Also, different kinds of methodologies have been presented on inverter switching losses, inverter output current/ voltage total harmonic distortion (THD), inverter maximum output of DC bus voltage. The Sinusoidal PWM is generally used to control the inverter output voltage and it helps to maintains drive performance. The recent years have seen digital modulation mechanisms based on theory of space vector i.e. Space vector PWM (SVPWM). The SVPWM mechanism offers the enhanced amplitude modulation indexes (MI) than sinusoidal PWM along with the reduction in the harmonics of inverter output voltage and reduced communication losses. Currently, the digital control mechanisms have got more attention than the analog counterparts, as the performance and reliability of microprocessors has increased. Most of the SVPWM mechanisms are performed by using the analog or digital circuits like microcontrollers and DSPs. From the recent study, analysis gives that use of Field Programmable Gate Arrays (FPGA) can offer more efficient and faster solutions. This paper discusses the numerous existing research aspects of FPGA realization for voltage source inverter (VSI) along with the future line of research.


2021 ◽  
Vol 23 (06) ◽  
pp. 1682-1698
Author(s):  
Laxmi Singh ◽  
◽  
Dr. Imran ◽  

The model of a three-phase voltage source inverter is examined based on space vector theory. SVPWM offers an improved outcome with the inverter as compared to the conservative SPWM technique for the inverter. There is a 15.5% upsurge in the line voltage of the inverter. SVPWM better exploits the available DC-link power with the SVPWM inverter. It has been revealed that the SVPWM method utilizes DC bus voltage extra competently and produces a smaller amount of harmonic distortion and easier digital realization in a three-phase voltage-source inverter. For converter‘s gating signals generation, the space-vector pulse width modulation (SVPWM) strategy lessens the switching losses by restricting the switching to two-thirds of the pulse duty cycle. A hypothetical study regarding the use of the SVPWM the three-level voltage inverter and simulation results are offered to prove the usefulness of the SVPWM in the involvement in the switching power losses lessening, output voltages with fewer harmonics. Nevertheless, despite all the above-cited benefits that SVPWM enjoys over SPWM, the SVPWM technique used in three-level inverters is more difficult on account of a large number of inverter switching states. The attained simulation outcomes were satisfactory. As prospects, future experimental works will authenticate the simulation results. A software simulation model is developed in Matlab/Simulink.


Energies ◽  
2020 ◽  
Vol 13 (24) ◽  
pp. 6581
Author(s):  
Fernando Acosta-Cambranis ◽  
Jordi Zaragoza ◽  
Luis Romeral ◽  
Néstor Berbel

Multiphase systems provides benefits compared to three-phase systems, such as improved torque per ampere, high power density, better fault tolerance, lower current per phase (due to power-splitting among a higher number of phases), and lower torque ripple, among others. Depending on the application, the system must meet determined requirements, such as the presence of harmonic content, power losses, and common-mode voltage (CMV) generation. This paper presents a comparative analysis of space vector modulation (SVM) techniques applied to a five-phase voltage source inverter with SiC switches to provide an overview of their performance. The performance of five-phase 2L SVPWM (space vector pulse width modulation), 2L+2M SVPWM, 4L SVPWM techniques, and their discontinuous versions, are analyzed by focusing on harmonic content, power losses, and CMV generation using SiC semiconductor devices. Matlab/Simulink and PLECS simulations are performed to achieve the above mentioned goal. The use of different techniques allows (1) reducing the harmonic distortion when 2L+2M SVPWM and 4L SVPWM are applied, and (2) the switching sequence of the modulation techniques can influence the switching losses. Therefore, the use of SiC switches reduces the switching losses. (3) However, CMV dv/dt increases. Therefore, it is possible to minimize the effects of the CMV dv/dt and amplitude by choosing the adequate technique.


2021 ◽  
pp. 46-63
Author(s):  
Mohamed K. Ratib ◽  
Ahmed Rashwan

Memory, speed, reliability, and efficiency are the main characteristics of concern in new contemporary control techniques of electric power converters. Space vector pulse width modulation (SVPWM) is a widespread digital compute-intensive control technique used in the control of power converters. This study aims to overcome the large number of calculations needed by the SVPWM algorithm, which limits its implementation in many advanced industrial applications. This paper presents a low-cost software implemented simplified SVPWM technique. The proposed strategy generates the inverter switching times in a straightforward manner with no need for complicated and time-consuming sector identification and look-up switching tables. A simulation study has been done using MATLAB/SIMULINK environment for the three-phase voltage source converter (VSC). The results in terms of total harmonic distortion (THD) in the converter line voltage are compared for the proposed technique, conventional SVPWM, and space pulse width modulation (SPWM). The execution time is reduced considerably with a slight increase in the value of THD and about 14.4 percent DC-link voltage utilization over the SPWM.


2014 ◽  
Vol 573 ◽  
pp. 115-121
Author(s):  
C.S. Subash Kumar ◽  
V. Gopalakrishnan ◽  
R. Dhanasekaran ◽  
B. Vaikundaselvan

The wide spread use of power electronics equipments in modern electrical systems, has became a major concern due to the adverse effects of harmonics on all the sensitive equipments. This paper presents the implementation of shunt active power filter (SAPF) using source voltage and source current detection. The control and implementation of SAPF is being done by instantaneous active and reactive power, PQ theory for the extraction of harmonics from the fundamental and for the generation of Pulses for the voltage source inverter (VSI), space vector pulse width modulation (SVPWM) is used. The harmonics present in the system are computed and the controller generates PWM signals to inject the compensating harmonic current back into the line to cancel the harmonic components in the distorted line. The performance of proposed topology is first examined by MATLAB-SIMLINK-based simulation and the prototype hardware has been developed using DSP TMS320F28027 processor and the results were verified. The Total harmonic distortion (THD) is below the specified limits.


2018 ◽  
Vol 1 (1) ◽  
pp. 54-66
Author(s):  
Rakan Khalil Antar ◽  
Basil Mohammed Saied ◽  
Rafid Ahmed Khalil

A new control strategy for active power filters is proposed, modeled and implemented in order to improve the power quality of a line commutated converter High voltage DC link. The ability of reactive power and harmonics reductions are generally met by using passive and active power filters. In this paper, modified active power filter with a modified harmonics pulse width modulation algorithm is used to minimize the source harmonics and force the AC supply current to be in the same phase with AC voltage source at both sending and receiving sides of a line commutated converter high voltage DC link. Therefore, it is considered as power factor corrector and harmonics eliminator with random variations in the load current. The modified harmonics pulse width modulation algorithm is applicable for active power filter based on a three-phase five-level and seven-level cascaded H-bridge voltage source inverter. Simulation results show that the suggested modified multilevel active power filters improve total harmonics distortion of both voltage and current with almost unity effective power factor at both AC sides of high voltage DC link. Therefore, modified active power filter is an effective tool for power quality improvement and preferable for line commutated converter high voltage DC link at different load conditions.


2007 ◽  
Vol 4 (2) ◽  
pp. 171-187 ◽  
Author(s):  
S. Jeevananthan ◽  
R. Nandhakumar ◽  
P. Dananjayan

This paper deals with a novel natural sampled pulse width modulation (PWM) switching strategy for voltage source inverter through carrier modification. The proposed inverted sine carrier PWM (ISCPWM) method, which uses the conventional sinusoidal reference signal and an inverted sine carrier, has a better spectral quality and a higher fundamental component compared to the conventional sinusoidal PWM (SPWM) without any pulse dropping. The ISCPWM strategy enhances the fundamental output voltage particularly at lower modulation index ranges while keeping the total harmonic distortion (THD) lower without involving changes in device switching losses. The presented mathematical preliminaries for both SPWM and ISCPWM give a conceptual understanding and a comparison of the strategies. The detailed comparison of the harmonic content and fundamental component of the ISCPWM output for different values of modulation index with the results obtained for the SPWM is also presented. Finally, the proposed modulator has been implemented in field programmable gate array (FPGA- Xilinx Spartan 3) and tested with the proto-type inverter.


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