scholarly journals Inverted sine carrier for fundamental fortification in PWM inverters and FPGA based implementations

2007 ◽  
Vol 4 (2) ◽  
pp. 171-187 ◽  
Author(s):  
S. Jeevananthan ◽  
R. Nandhakumar ◽  
P. Dananjayan

This paper deals with a novel natural sampled pulse width modulation (PWM) switching strategy for voltage source inverter through carrier modification. The proposed inverted sine carrier PWM (ISCPWM) method, which uses the conventional sinusoidal reference signal and an inverted sine carrier, has a better spectral quality and a higher fundamental component compared to the conventional sinusoidal PWM (SPWM) without any pulse dropping. The ISCPWM strategy enhances the fundamental output voltage particularly at lower modulation index ranges while keeping the total harmonic distortion (THD) lower without involving changes in device switching losses. The presented mathematical preliminaries for both SPWM and ISCPWM give a conceptual understanding and a comparison of the strategies. The detailed comparison of the harmonic content and fundamental component of the ISCPWM output for different values of modulation index with the results obtained for the SPWM is also presented. Finally, the proposed modulator has been implemented in field programmable gate array (FPGA- Xilinx Spartan 3) and tested with the proto-type inverter.

Energies ◽  
2020 ◽  
Vol 13 (24) ◽  
pp. 6581
Author(s):  
Fernando Acosta-Cambranis ◽  
Jordi Zaragoza ◽  
Luis Romeral ◽  
Néstor Berbel

Multiphase systems provides benefits compared to three-phase systems, such as improved torque per ampere, high power density, better fault tolerance, lower current per phase (due to power-splitting among a higher number of phases), and lower torque ripple, among others. Depending on the application, the system must meet determined requirements, such as the presence of harmonic content, power losses, and common-mode voltage (CMV) generation. This paper presents a comparative analysis of space vector modulation (SVM) techniques applied to a five-phase voltage source inverter with SiC switches to provide an overview of their performance. The performance of five-phase 2L SVPWM (space vector pulse width modulation), 2L+2M SVPWM, 4L SVPWM techniques, and their discontinuous versions, are analyzed by focusing on harmonic content, power losses, and CMV generation using SiC semiconductor devices. Matlab/Simulink and PLECS simulations are performed to achieve the above mentioned goal. The use of different techniques allows (1) reducing the harmonic distortion when 2L+2M SVPWM and 4L SVPWM are applied, and (2) the switching sequence of the modulation techniques can influence the switching losses. Therefore, the use of SiC switches reduces the switching losses. (3) However, CMV dv/dt increases. Therefore, it is possible to minimize the effects of the CMV dv/dt and amplitude by choosing the adequate technique.


Author(s):  
Saravanan M ◽  
Nandakumar R ◽  
Veerabalaji G

This paper presents a field programmable gate array(FPGA)-based control integrated  circuits(IC) for controlling the pulsewidth modulation (PWM) inverter used in power conditioning system for ac-voltage regulation. Space vector pulsewidth modulation(SVPWM) algorithm offers great flexibility to optimise switching waveform. Among them,double edge triggering can be implemented, It consumes less power compare to other PWM techniques. The SVPWM pulses thus generated through Xilinx is given as switching pulses to voltage source inverter(VSI) circuit to trigger the motor. The delay time of PWM output is programmable and SVPWM control IC is reprogrammable.It shows the advantage of lower total harmonic distortion(THD) without increasing the switching losses. Results  are provided along with simulation analysis in terms of THD,output fundamental voltage and voltage transfer ratio to verify the feasibility of operation. The SVPWM switching pattern has been achieved with a fundamental frequency of  50HZ.


Author(s):  
Shalini Vashishtha ◽  
K.R. Rekha

Since last decades, the pulse width modulation (PWM) techniques have been an intensive research subject. Also, different kinds of methodologies have been presented on inverter switching losses, inverter output current/ voltage total harmonic distortion (THD), inverter maximum output of DC bus voltage. The Sinusoidal PWM is generally used to control the inverter output voltage and it helps to maintains drive performance. The recent years have seen digital modulation mechanisms based on theory of space vector i.e. Space vector PWM (SVPWM). The SVPWM mechanism offers the enhanced amplitude modulation indexes (MI) than sinusoidal PWM along with the reduction in the harmonics of inverter output voltage and reduced communication losses. Currently, the digital control mechanisms have got more attention than the analog counterparts, as the performance and reliability of microprocessors has increased. Most of the SVPWM mechanisms are performed by using the analog or digital circuits like microcontrollers and DSPs. From the recent study, analysis gives that use of Field Programmable Gate Arrays (FPGA) can offer more efficient and faster solutions. This paper discusses the numerous existing research aspects of FPGA realization for voltage source inverter (VSI) along with the future line of research.


2021 ◽  
Vol 23 (06) ◽  
pp. 1682-1698
Author(s):  
Laxmi Singh ◽  
◽  
Dr. Imran ◽  

The model of a three-phase voltage source inverter is examined based on space vector theory. SVPWM offers an improved outcome with the inverter as compared to the conservative SPWM technique for the inverter. There is a 15.5% upsurge in the line voltage of the inverter. SVPWM better exploits the available DC-link power with the SVPWM inverter. It has been revealed that the SVPWM method utilizes DC bus voltage extra competently and produces a smaller amount of harmonic distortion and easier digital realization in a three-phase voltage-source inverter. For converter‘s gating signals generation, the space-vector pulse width modulation (SVPWM) strategy lessens the switching losses by restricting the switching to two-thirds of the pulse duty cycle. A hypothetical study regarding the use of the SVPWM the three-level voltage inverter and simulation results are offered to prove the usefulness of the SVPWM in the involvement in the switching power losses lessening, output voltages with fewer harmonics. Nevertheless, despite all the above-cited benefits that SVPWM enjoys over SPWM, the SVPWM technique used in three-level inverters is more difficult on account of a large number of inverter switching states. The attained simulation outcomes were satisfactory. As prospects, future experimental works will authenticate the simulation results. A software simulation model is developed in Matlab/Simulink.


Author(s):  
Sunny Katyara ◽  
Ashfaque Hussain Hashmani ◽  
Bhawani Shanker Chowdhry

SVPWM (Space Vector Pulse Width Modulation) technique is type of traditional PWM method that efficiently utilizes its dc link voltage and generates high voltage pulses with low harmonic content and high modulation index. VSI (Voltage Source Inverter) with SVPWM generates adjustable voltage and frequency signals for VSDs (Variable Speed Drives). This research work presents the simplified SVPWM technique for controlling the speed and torque of induction motor. The performance of developed SVPWM technique is analyzed in terms of its switching losses and harmonic content and compared with SPWM (Sinusoidal Pulse Width Modulation). Mathematical modeling for induction motor control through two-level VSI with SVPWM and SPWM is presented. The voltage and current TDHs (Total Harmonic Distortions) of the drive with SVPWM technique are 73.23 and 63.3% respectively as compared to 101.99 and 77.89% with SPWM technique. Similarly, the switching losses with SVPWM technique are 178.79 mW and that of with SPWM are 269.45 mW. Simulink modeling and laboratory setup are developed to testify the efficacy of SVPWM and SPWM techniques. The modulation factor of SVPWM technique is 0.907 which is higher as compared to SPWM technique with 0.785 modulation factor.


This paper presents design of a T-type multilevel inverters (MLI). Now-a-days, MLIs are usually require lesser number of elements like switches, capacitors as compared to conventional two-level inverters. Hence, MLIs are becoming very vital component in the area of power Electronics applications. Therefore, lots of research works are going on in this field for improvement in the topologies of MLIs. The main area of investigation in the design of MLIs are to maintain fixed level of voltage, less modulation index and switching losses. In this paper, a new type MLI such as a five-level based T-type MLI is designed and implemented. For that a prototype of the MLI is constructed. Then its performance is analyzed with appropriate simulation and experimental results. Again, its results are compared with that of another topology called five-level Cascaded H-Bridge type MLI. For better comparison, same type of modulation technique; Sinusoidal Pulse Width Modulation technique is used in both cases. The comparison is based on circuit complexity, modulation index and Total Harmonic Distortion (THD) of output voltage. From the analysis it is found that performance of the proposed MLI is better compared to that of the Cascaded H-Bridge type MLI.


2015 ◽  
Vol 2015 ◽  
pp. 1-6 ◽  
Author(s):  
L. U. Sudha ◽  
J. Baskaran ◽  
S. A. Elankurisil

This paper corroborates three different hybrid modulation strategies suitable for single-phase voltage source inverter. The proposed method is formulated using fundamental switching and carrier based pulse width modulation methods. The main tale of this proposed method is to optimize a specific performance criterion, such as minimization of the total harmonic distortion (THD), lower order harmonics, switching losses, and heat losses. The proposed method is articulated using fundamental switching and carrier based pulse width modulation methods. Thus, the harmonic pollution in the power system will be reduced and the power quality will be augmented with better harmonic profile for a target fundamental output voltage. The proposed modulation strategies are simulated in MATLAB r2010a and implemented in a Xilinx spartan 3E-500 FG 320 FPGA processor. The feasibility of these modulation strategies is authenticated through simulation and experimental results.


Author(s):  
V. srinath ◽  
Man Mohan Agarwal ◽  
D. K. Chaturvedi

In this paper, a modified Sinusoidal Pulse width Modulation (MSPWM) technique and a modified single-phase H-bridge seven-level inverter is proposed. The switching pulses for the proposed seven-level inverter are generated using a single triangular carrier waveform, a fully rectified sinusoidal signal, and three stepped reference signals (Uref1, Uref2 and Uref3). Using optimization technique, the magnitude of the stepped reference signal is determined so that the total harmonic distortion (THD) of the output voltage waveform is minimum and the fundamental component, RMS value of the voltage is improved for a given modulation index Ma as compared to the Sinusoidal Pulse width Modulation (SPWM). By the implementation of the new scheme, the seven-level of the inverter output voltage level (+Vdc, +2Vdc/3, +Vdc/3, 0, −Vdc, −2Vdc/3, −Vdc) is obtained for any given modulation index. Similarly, if only two stepped reference signals are used then the inverter will act as a five-level inverter for any modulating index ma. The proposed MSPWM and seven-level inverter are simulated on MATLAB/SIMULINK for R, R-L load and on a single-phase capacitor-start and capacitor-start-run Induction Motor.


Author(s):  
Ezzidin Hassan Elmabrouk Aboadla ◽  
Sheroz Khan ◽  
Mohamed Hadi Habaebi ◽  
Teddy Gunawan ◽  
Belal Ahmed Hamidah ◽  
...  

Author(s):  
Sreenivasappa Bhupasandra Veeranna ◽  
Udaykumar R Yaragatti ◽  
Abdul R Beig

The digital control of three-level voltage source inverter fed high power high performance ac drives has recently become a popular in industrial applications. In order to control such drives, the pulse width modulation algorithm needs to be implemented in the controller. In this paper, synchronized symmetrical bus-clamping pulse width modulation strategies are presented. These strategies have some practical advantages such as reduced average switching frequency, easy digital implementation, reduced switching losses and improved output voltage quality compared to conventional space vector pulse width modulation strategies. The operation of three level inverter in linear region is extended to overmodulation region. The performance is analyzed in terms THD and fundamental output voltage waveforms and is compared with conventional space vector PWM strategies and found that switching losses can be minimized using bus-clamping strategy compared to conventional space vector strategy. The proposed method is implemented using Motorola Power PC 8240 processor and verified on a constant v/f induction motor drive fed from IGBT based inverter.


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