scholarly journals Characterization of silicon tunnel field effect transistor based on charge plasma

2022 ◽  
Vol 25 (1) ◽  
pp. 138
Author(s):  
Firas Natheer Abdul-kadir ◽  
Faris Hassan Taha
Keyword(s):  
Work Function ◽  
Field Effect ◽  
Field Effect Transistor ◽  
Oxide Thickness ◽  
Channel Length ◽  
Charge Plasma ◽  
Effect Transistor ◽  
Tunnel Field Effect Transistor ◽  
High Dielectric ◽  
K 12

The aim of the proposed paper is an analytical model and realization of the characteristics for tunnel field-effect transistor (TFET) based on charge plasma (CP). One of the most applications of the TFET device which operates based on CP technique is the biosensor. CP-TFET is to be used as an effective device to detect the uncharged molecules of the bio-sample solution. Charge plasma is one of some techniques that recently invited to induce charge carriers inside the devices. In this proposed paper we use a high work function in the source (ϕ=5.93 eV) to induce hole charges and we use a lower work function in drain (ϕ=3.90 eV) to induce electron charges. Many electrical characterizations in this paper are considered to study the performance of this device like a current drain (ID) versus voltage gate (Vgs), ION/IOFF ratio, threshold voltage (VT) transconductance (gm), and sub-threshold swing (SS). The signification of this paper comes into view enhancement the performance of the device. Results show that high dielectric (K=12), oxide thickness (Tox=1 nm), channel length (Lch=42 nm), and higher work function for the gate (ϕ=4.5 eV) tend to best charge plasma silicon tunnel field-effect transistor characterization.

scholarly journals Impact of band to band Tunneling on Transient performance of Dual Gate Tunnel Field Effect Transistor (TFET)

2019 ◽  
Vol 8 (9) ◽  
pp. 284-288
Keyword(s):  
Work Function ◽  
Field Effect ◽  
Field Effect Transistor ◽  
Digital Circuit ◽  
Voltage Range ◽  
Metal Work Function ◽  
Band To Band Tunneling ◽  
Effect Transistor ◽  
Tunnel Field Effect Transistor ◽  
Metal Work

Tunnel Field Effect Transistor (TFET) is gated reverse biased P-I-N diode structured semiconductor device and can be considered as a reliable low power device. TCAD (Sentaurus 2D) simulations for various Gate metal work function (4.1-4.3 eV) shows that its ON-current (ION) arises from quantum mechanical band-to-band tunneling (B2BT) and observed that threshold Voltage (VT) for TFET decreases with increase in Gate metal work function. The thermionic emission of electrons in MOSFET limits the sub-threshold swing (SS) by 60 mV/dec whereas TFET has potential for low SS ie. SS<60 mV/dec. TCAD Simulations confirmed that that the Gate – Drain capacitance (Cgd) strongly follows the Gate capacitance (Cgg) all over the voltage range (0-0.9V) which increases the miller capacitance for TFET. It is investigated that for TFET, the injection of carriers into the channel is through B2BT which effectively couples the Gate charge to the Drain. A look up table based Verilog-A model is generated for TFET and used to simulate the static and dynamic behavior of TFET based digital circuit in Cadence spectre. Miller effect causes the peak voltage overshoots are noticed at the drain side during transient responses and can be responsible for dynamic power loss and high turn ON/OFF delay

scholarly journals Design and Simulation of Silicon Nanowire Tunnel Field Effect Transistor

2021 ◽  
Author(s):  
Parveen Kumar ◽  
Balwinder Raj
Keyword(s):  
Field Effect ◽  
Field Effect Transistor ◽  
Silicon Nanowire ◽  
Oxide Thickness ◽  
Doping Profile ◽  
Subthreshold Slope ◽  
Current Ratio ◽  
Effect Transistor ◽  
Tunnel Field Effect Transistor ◽  
Nanowire Structure

This paper analyses the different parameters of tunnel field-effect transistor (TFET) based on silicon Nanowire in vertical nature by using a Gaussian doping profile. The device has been designed using an n-channel P+-I-N+ structure for tunneling junction of TFET with gate-all-around (GAA) Nanowire structure. The gate length has been taken as 100 nm using silicon Nanowire to obtain the various parameters such as ON-current (ION), OFF-current (IOFF), current ratio, and Subthreshold slope (SS) by applying different values of work function at the gate, the radius of Nanowire and oxide thickness of the device. The simulations are performed on Silvaco TCAD which gives a better parametric analysis over conventional tunnel field-effect transistor.

A high performance gate engineered charge plasma based tunnel field effect transistor

2015 ◽  
Vol 14 (2) ◽  
pp. 477-485 ◽  
Author(s):  
Faisal Bashir ◽  
Sajad A. Loan ◽  
M. Rafat ◽  
Abdul Rehman M. Alamoud ◽  
Shuja A. Abbasi
Keyword(s):  
Field Effect ◽  
High Performance ◽  
Field Effect Transistor ◽  
Charge Plasma ◽  
Effect Transistor ◽  
Tunnel Field Effect Transistor
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