FPGA Synthesis of Reconfigurable Modules for FIR Filter

2015 ◽  
Vol 4 (2) ◽  
pp. 63
Author(s):  
Saranya R ◽  
Pradeep C ◽  
Neena Baby ◽  
Radhakrishnan R
Keyword(s):  
Reconfigurable Computing ◽  
Fault Tolerant ◽  
Fir Filter ◽  
Divide And Conquer ◽  
Coarse Grained ◽  
Verilog Hdl ◽  
Detection Mechanism ◽  
Fine Grained ◽  
Dsp Systems ◽  
Important Building Block

Reconfigurable computing for DSP remains an active area to explore as the need for incorporation with more conventional DSP technologies turn out to be obvious. Conventionally, the majority of the work in the area of reconfigurable computing is aimed on fine grained FPGA devices. Over the years, the focus is shifted from bit level granularity to a coarse grained composition. FIR filter remains and persist to be an important building block in various DSP systems. It computes the output by multiplying input samples with a set of coefficients followed by addition. Here multipliers and adders are modeled using the concept of divide and conquer. For developing a reconfiguarble FIR filter, different tap filters are designed as separate reconfigurable modules. Furthermore, there is an additional concern for making the system fault tolerant. A fault detection mechanism is introduced to detect the faults based on the nature of operands. The reconfigurable modules are structurally modeled in Verilog HDL and simulated and synthesized using Xilinx ISE 14.2. A comparison of the device utilization of reconfigurable modules is also presented in this paper by implementing the design on various Virtex FPGA devices.

High-Performance Reconfigurable Computing

2019 ◽  
pp. 731-744
Author(s):  
Mário Pereira Vestias
Keyword(s):  
Power Consumption ◽  
Integrated Circuit ◽  
Reconfigurable Computing ◽  
High Performance ◽  
General Purpose ◽  
Reconfigurable Hardware ◽  
Coarse Grained ◽  
Lower Power ◽  
Fine Grained ◽  
Application Specific

High-performance reconfigurable computing systems integrate reconfigurable technology in the computing architecture to improve performance. Besides performance, reconfigurable hardware devices also achieve lower power consumption compared to general-purpose processors. Better performance and lower power consumption could be achieved using application-specific integrated circuit (ASIC) technology. However, ASICs are not reconfigurable, turning them application specific. Reconfigurable logic becomes a major advantage when hardware flexibility permits to speed up whatever the application with the same hardware module. The first and most common devices utilized for reconfigurable computing are fine-grained FPGAs with a large hardware flexibility. To reduce the performance and area overhead associated with the reconfigurability, coarse-grained reconfigurable solutions has been proposed as a way to achieve better performance and lower power consumption. In this chapter, the authors provide a description of reconfigurable hardware for high-performance computing.

High-Performance Reconfigurable Computing

2018 ◽  
pp. 4018-4029
Author(s):  
Mário Pereira Vestias
Keyword(s):  
Power Consumption ◽  
Integrated Circuit ◽  
Reconfigurable Computing ◽  
High Performance ◽  
General Purpose ◽  
Reconfigurable Hardware ◽  
Coarse Grained ◽  
Lower Power ◽  
Fine Grained ◽  
Application Specific

High-Performance Reconfigurable Computing systems integrate reconfigurable technology in the computing architecture to improve performance. Besides performance, reconfigurable hardware devices also achieve lower power consumption compared to General-Purpose Processors. Better performance and lower power consumption could be achieved using Application Specific Integrated Circuit (ASIC) technology. However, ASICs are not reconfigurable, turning them application specific. Reconfigurable logic becomes a major advantage when hardware flexibility permits to speed up whatever the application with the same hardware module. The first and most common devices utilized for reconfigurable computing are fine-grained FPGAs with a large hardware flexibility. To reduce the performance and area overhead associated with the reconfigurability, coarse-grained reconfigurable solutions has been proposed as a way to achieve better performance and lower power consumption. In this chapter we will provide a description of reconfigurable hardware for high performance computing.

scholarly journals HoneyComb: An Application-Driven Online Adaptive Reconfigurable Hardware Architecture

2012 ◽  
Vol 2012 ◽  
pp. 1-17 ◽  
Author(s):  
Alexander Thomas ◽  
Michael Rückauer ◽  
Jürgen Becker
Keyword(s):  
Power Consumption ◽  
Reconfigurable Computing ◽  
Register Transfer Level ◽  
Coarse Grained ◽  
Fine Grained ◽  
Reconfigurable Devices ◽  
Resource Requirements ◽  
Broad Variety ◽  
And Performance ◽  
Reconfigurable Hardware Architecture

Since the introduction of the first reconfigurable devices in 1985 the field of reconfigurable computing developed a broad variety of architectures from fine-grained to coarse-grained types. However, the main disadvantages of the reconfigurable approaches, the costs in area, and power consumption, are still present. This contribution presents a solution for application-driven adaptation of our reconfigurable architecture at register transfer level (RTL) to reduce the resource requirements and power consumption while keeping the flexibility and performance for a predefined set of applications. Furthermore, implemented runtime adaptive features like online routing and configuration sequencing will be presented and discussed. A presentation of the prototype chip of this architecture designed in 90 nm standard cell technology manufactured by TSMC will conclude this contribution.

Design of a Wireless Router with Virtual Channel Fault Tolerant in WiNoC

2019 ◽  
Vol 29 (10) ◽  
pp. 2050171
Author(s):  
Yiming Ouyang ◽  
Wu Zhou ◽  
Sheng Li ◽  
Zhilu Wang ◽  
Huaguo Liang ◽  
...  
Keyword(s):  
Network Performance ◽  
Fault Tolerant ◽  
Wireless Channel ◽  
Coarse Grained ◽  
Operating Efficiency ◽  
Virtual Channel ◽  
Permanent Fault ◽  
Fine Grained ◽  
Wireless Router ◽  
Wireless Interface

Due to chip manufacturing process defects and other factors, the virtual channel permanent fault may occur at the wireless interface in the WiNoC. This fault will affect the operating efficiency of the wireless router and degrade the network performance of the chip. In order to effectively tolerate permanent faults in virtual channels, faults are subdivided into coarse-grained and fine-grained faults. When a fine-grained fault of the virtual channel occurs at the wireless interface, the remapping mechanism is used to tolerate it; when a coarse-grained fault occurs, this unavailable virtual channel is directly abandoned and permanent fault information is broadcast to all nodes in the network. Packets that require a wireless channel can be routed to avoid passing through the fault wireless router. This method can effectively reduce the routing delay caused by the permanent fault of the virtual channel at the wireless interface. Experiments show that compared with the traditional WiNoC and other WiNoC fault-tolerant schemes, the fault-tolerant scheme proposed in this paper has a great improvement in performance and the advantages of low overhead and good scalability.

Correlation between dislocation, grain boundary and interface of duplex SS in stress corrosion cracking(SCC)

1990 ◽  
Vol 48 (4) ◽  
pp. 928-929
Author(s):  
Wang Zheng-fang ◽  
Z.F. Wang
Keyword(s):  
Stainless Steel ◽  
Thermal Cycle ◽  
Secondary Phase ◽  
Corrosion Cracking ◽  
Coarse Grained ◽  
Test Environment ◽  
Fine Grained ◽  
Evaluation Test ◽  
Welding Thermal Cycle ◽  
Micro Analysis

The main purpose of this study highlights on the evaluation of chloride SCC resistance of the material,duplex stainless steel,OOCr18Ni5Mo3Si2 (18-5Mo) and its welded coarse grained zone(CGZ).18-5Mo is a dual phases (A+F) stainless steel with yield strength:512N/mm2 .The proportion of secondary Phase(A phase) accounts for 30-35% of the total with fine grained and homogeneously distributed A and F phases(Fig.1).After being welded by a specific welding thermal cycle to the material,i.e. Tmax=1350°C and t8/5=20s,microstructure may change from fine grained morphology to coarse grained morphology and from homogeneously distributed of A phase to a concentration of A phase(Fig.2).Meanwhile,the proportion of A phase reduced from 35% to 5-10°o.For this reason it is known as welded coarse grained zone(CGZ).In association with difference of microstructure between base metal and welded CGZ,so chloride SCC resistance also differ from each other.Test procedures:Constant load tensile test(CLTT) were performed for recording Esce-t curve by which corrosion cracking growth can be described, tf,fractured time,can also be recorded by the test which is taken as a electrochemical behavior and mechanical property for SCC resistance evaluation. Test environment:143°C boiling 42%MgCl2 solution is used.Besides, micro analysis were conducted with light microscopy(LM),SEM,TEM,and Auger energy spectrum(AES) so as to reveal the correlation between the data generated by the CLTT results and micro analysis.

scholarly journals s2p: Provenance Research for Stream Processing System

2021 ◽  
Vol 11 (12) ◽  
pp. 5523
Author(s):  
Qian Ye ◽  
Minyan Lu
Keyword(s):  
Data Storage ◽  
Stream Processing ◽  
Processing System ◽  
Coarse Grained ◽  
Stream Data ◽  
Related Data ◽  
Dsp System ◽  
Provenance Research ◽  
Dsp Systems ◽  
Abnormal Results

The main purpose of our provenance research for DSP (distributed stream processing) systems is to analyze abnormal results. Provenance for these systems is not nontrivial because of the ephemerality of stream data and instant data processing mode in modern DSP systems. Challenges include but are not limited to an optimization solution for avoiding excessive runtime overhead, reducing provenance-related data storage, and providing it in an easy-to-use fashion. Without any prior knowledge about which kinds of data may finally lead to the abnormal, we have to track all transformations in detail, which potentially causes hard system burden. This paper proposes s2p (Stream Process Provenance), which mainly consists of online provenance and offline provenance, to provide fine- and coarse-grained provenance in different precision. We base our design of s2p on the fact that, for a mature online DSP system, the abnormal results are rare, and the results that require a detailed analysis are even rarer. We also consider state transition in our provenance explanation. We implement s2p on Apache Flink named as s2p-flink and conduct three experiments to evaluate its scalability, efficiency, and overhead from end-to-end cost, throughput, and space overhead. Our evaluation shows that s2p-flink incurs a 13% to 32% cost overhead, 11% to 24% decline in throughput, and few additional space costs in the online provenance phase. Experiments also demonstrates the s2p-flink can scale well. A case study is presented to demonstrate the feasibility of the whole s2p solution.

scholarly journals Balanced Sparsity for Efficient DNN Inference on GPU

2019 ◽  
Vol 33 ◽  
pp. 5676-5683 ◽  
Author(s):  
Zhuliang Yao ◽  
Shijie Cao ◽  
Wencong Xiao ◽  
Chen Zhang ◽  
Lanshun Nie
Keyword(s):  
Deep Neural Networks ◽  
General Purpose ◽  
Coarse Grained ◽  
Efficient Computation ◽  
Model Accuracy ◽  
Sparse Model ◽  
Model Inference ◽  
Fine Grained ◽  
Practical Inference ◽  
Speed Up

In trained deep neural networks, unstructured pruning can reduce redundant weights to lower storage cost. However, it requires the customization of hardwares to speed up practical inference. Another trend accelerates sparse model inference on general-purpose hardwares by adopting coarse-grained sparsity to prune or regularize consecutive weights for efficient computation. But this method often sacrifices model accuracy. In this paper, we propose a novel fine-grained sparsity approach, Balanced Sparsity, to achieve high model accuracy with commercial hardwares efficiently. Our approach adapts to high parallelism property of GPU, showing incredible potential for sparsity in the widely deployment of deep learning services. Experiment results show that Balanced Sparsity achieves up to 3.1x practical speedup for model inference on GPU, while retains the same high model accuracy as finegrained sparsity.

scholarly journals Submarine lava deltas of the 2018 eruption of Kīlauea volcano

2021 ◽  
Vol 83 (4) ◽  
Author(s):  
S. Adam Soule ◽  
Michael Zoeller ◽  
Carolyn Parcheta
Keyword(s):  
Grain Size ◽  
Pore Pressure ◽  
Mechanistic Model ◽  
Large Fraction ◽  
Volcanic Hazards ◽  
Lava Flows ◽  
Coarse Grained ◽  
Fine Grained ◽  
Fine Grain ◽  
Delta Formation

AbstractHawaiian and other ocean island lava flows that reach the coastline can deposit significant volumes of lava in submarine deltas. The catastrophic collapse of these deltas represents one of the most significant, but least predictable, volcanic hazards at ocean islands. The volume of lava deposited below sea level in delta-forming eruptions and the mechanisms of delta construction and destruction are rarely documented. Here, we report on bathymetric surveys and ROV observations following the Kīlauea 2018 eruption that, along with a comparison to the deltas formed at Pu‘u ‘Ō‘ō over the past decade, provide new insight into delta formation. Bathymetric differencing reveals that the 2018 deltas contain more than half of the total volume of lava erupted. In addition, we find that the 2018 deltas are comprised largely of coarse-grained volcanic breccias and intact lava flows, which contrast with those at Pu‘u ‘Ō‘ō that contain a large fraction of fine-grained hyaloclastite. We attribute this difference to less efficient fragmentation of the 2018 ‘a‘ā flows leading to fragmentation by collapse rather than hydrovolcanic explosion. We suggest a mechanistic model where the characteristic grain size influences the form and stability of the delta with fine grain size deltas (Pu‘u ‘Ō‘ō) experiencing larger landslides with greater run-out supported by increased pore pressure and with coarse grain size deltas (Kīlauea 2018) experiencing smaller landslides that quickly stop as the pore pressure rapidly dissipates. This difference, if validated for other lava deltas, would provide a means to assess potential delta stability in future eruptions.

scholarly journals A cooperative DDoS attack detection scheme based on entropy and ensemble learning in SDN

2021 ◽  
Vol 2021 (1) ◽  
Author(s):  
Shanshan Yu ◽  
Jicheng Zhang ◽  
Ju Liu ◽  
Xiaoqing Zhang ◽  
Yafeng Li ◽  
...  
Keyword(s):  
Ensemble Learning ◽  
Denial Of Service ◽  
Attack Detection ◽  
Coarse Grained ◽  
Communication Overhead ◽  
Detection Scheme ◽  
Fine Grained ◽  
Ddos Attack ◽  
Network Status ◽  
Ddos Attack Detection

AbstractIn order to solve the problem of distributed denial of service (DDoS) attack detection in software-defined network, we proposed a cooperative DDoS attack detection scheme based on entropy and ensemble learning. This method sets up a coarse-grained preliminary detection module based on entropy in the edge switch to monitor the network status in real time and report to the controller if any abnormality is found. Simultaneously, a fine-grained precise attack detection module is designed in the controller, and a ensemble learning-based algorithm is utilized to further identify abnormal traffic accurately. In this framework, the idle computing capability of edge switches is fully utilized with the design idea of edge computing to offload part of the detection task from the control plane to the data plane innovatively. Simulation results of two common DDoS attack methods, ICMP and SYN, show that the system can effectively detect DDoS attacks and greatly reduce the southbound communication overhead and the burden of the controller as well as the detection delay of the attacks.

Rheology of hydrocarbon gels

1950 ◽  
Vol 200 (1061) ◽  
pp. 183-188 ◽  
Keyword(s):  
Mechanical Properties ◽  
Experimental Measurement ◽  
Theoretical Basis ◽  
Continuous Media ◽  
Point Of View ◽  
Coarse Grained ◽  
Testing Instrument ◽  
Fine Grained ◽  
Mineral Oils ◽  
Space And Time

Hydrocarbon gels contain a number of materials, such as rubber, greases, saponified mineral oils, etc., of great interest for various engineering purposes. Specific requirements in mechanical properties have been met by producing gels in appropriately chosen patterns of constituent components of visible, colloidal, molecular and atomic sizes, ranging from coarse-grained aggregates, represented by sponges, foams, emulsions, etc.; to fine-grained and apparently homogeneous ones, represented by optically clear compounds. The engineer who has to deal with the whole range of such materials will adopt a macroscopic point of view, based on an apparent continuity of all the material structures and of the distributions in space and time of the displacements and forces occurring under mechanical actions. It has been possible to determine these distributions in the framework of a comprehensive scheme in which the fundamental principles of the mechanics of continuous media provide the theoretical basis, and a testing instrument of new design, termed Rheogoniometer, the means of experimental measurement (Weissenberg 1931, 1934, 1946, 1947, 1948).

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