scholarly journals Detection and control of a gyroscopically induced vibration to improve the balance of a single-wheel robot

2017 ◽  
Vol 37 (3) ◽  
pp. 443-455 ◽  
Author(s):  
Sangdeok Lee ◽  
Seul Jung

In this article, an experimental investigation of the detection of a gyroscopically induced vibration and the balancing control performance of a single-wheel robot is presented. The balance of the single-wheel robot was intended to be maintained by virtue of the gyroscopic effect induced from a highly rotating flywheel. Since the flywheel rotates at a high speed, an asymmetrical structure of a flywheel causes an irregular rotation and becomes one of the major vibration sources. A vibration was detected and suppressed a priori before applying control algorithms to the robot. Gyroscopically induced vibrations can empirically be detected with different rotational velocities. The detection of the balancing angle of the single-wheel robot was accomplished by using an attitude and heading reference system. After identifying the vibrating frequencies, a notch filter was designed to suppress the vibration at the typical frequencies identified through experiments. A digital filter was designed and implemented in a digital signal processor(DSP) along with the control scheme for the balance control performance. The performance of the proposed method was verified by the experimental studies on the balancing control of the single-wheel robot. Experimental results confirmed that the notch filter designed following the detection of the flywheel’s vibration actually improved the balancing control performance. A half of the vibration magnitude was reduced by the proposal.

2018 ◽  
Vol 10 (1) ◽  
pp. 168781401775178
Author(s):  
Wu-Sung Yao

In general, eccentric gravity machinery is a rotation mechanism with eccentric pendulum mechanism, which can be used to convert continuously kinetic energy generated by gravity energy to electric energy. However, a stable rotated velocity of the eccentric gravity machinery is difficult to be achieved only using gravity energy. In this article, a stable velocity control system applied to eccentric gravity machinery is proposed. The dynamic characteristic of eccentric gravity machinery is analyzed and its mathematical model is established, which is used to design the controller. A stable running velocity of the eccentric gravity machinery can be operated by the controlled servomotor. Due to disturbances being periodic, repetitive controller is installed to velocity control loop. The stability performance and control performance of the repetitive control system are discussed. The iterative algorithm of the repetitive control is executed by a digital signal processor TI TMS320C32 floating-point processor. Simulated and experimental results are reported to verify the performance of the proposed eccentric gravity machinery control system.


2018 ◽  
Vol 15 (03) ◽  
pp. 1850005 ◽  
Author(s):  
Yeong-Geol Bae ◽  
Seul Jung

This paper presents the balancing control performance of a mobile manipulator built in the laboratory as a service robot called Korean robot worker (KOBOKER). The robot is designed and implemented with two wheels as a mobile base and two arms with six degrees-of-freedom each. Kinematics and dynamics of the robot are analyzed. For the balancing control performance, two wheels are controlled independently by the time-delayed control method based on the inertia model of the robot. The acceleration information obtained directly from the sensor is used for the modified disturbance observer structure called an acceleration-based disturbance observer (AbDOB). Experimental studies of the balancing control of the robot are conducted to compare the control performances by both a PID control method and an AbDOB.


2008 ◽  
Vol 144 ◽  
pp. 22-26 ◽  
Author(s):  
Arkadiusz Mystkowski ◽  
Zdzisław Gosiewski

Stabilization of a plant in case of uncertainty parameters and unmodeled dynamics are the main problems considered in this paper. A robust control of motion of a rigid shaft that is supported by magnetic bearings was used as an example. The dynamics of the active magnetic suspension system is characterized by instability and uncertainty. The uncertainty is modeled as an additive and multiplicative. Robust controller H∞ was designed for the defined plant with the uncertainty models. The robust controller assures high quality of control despite the uncertainty models. Robust control of vibrations of a rigid rotor is confirmed by experimental studies. A digital signal processor is used to execute the control algorithm in real time.


2014 ◽  
Vol 631-632 ◽  
pp. 806-810 ◽  
Author(s):  
Qing Xiang Hou ◽  
Xue Guang Yuan ◽  
Yan Gan Zhang ◽  
Jin Nan Zhang

A polarization stabilization control system based on digital signal processor (DSP) is proposed in this paper. The system uses low frequency radio frequency (RF) power as control signal for polarization stabilization, and it does not need high-speed circuit to track fast polarization change. Modified particle swarm optimization algorithm is utilized and the effectiveness of polarization stabilization control is experimentally verified.


Author(s):  
Markeljan Fishta ◽  
Franco Fiori

Abstract$$\varDelta \varSigma $$ Δ Σ analog-to-digital converters (ADCs) are largely used in sensor acquisition applications. In the last few years, standalone $$\varDelta \varSigma $$ Δ Σ modulators have become increasingly available as off-the-shelf parts. To build a complete ADC, a standalone modulator has to be paired with some advanced elaboration unit, such as a field programmable gate array (FPGA) or a digital signal processor (DSP), which is needed for the implementation of the decimation filter. This work investigates the use of low-cost, general-purpose microcontrollers for the decimation of $$\varDelta \varSigma $$ Δ Σ -modulated signals. The main challenge is given by the clock frequency of the modulator, which can be in the range of a few $$\hbox {MHz}$$ MHz . The proposed technique deals with this limitation by employing two serial peripheral interface (SPI) modules in a time-interleaved configuration. This approach allows for continuous acquisition and elaboration of relatively high-speed, digital signals. The technique has been applied to a case study, and a data conversion system has been practically realized. The performance of the proposed filter is compared to that of a digital filter, present on board a commercial microcontroller, and the results of experimental tests are provided.


2016 ◽  
Vol 25 (04) ◽  
pp. 1650027 ◽  
Author(s):  
Kore Sagar Dattatraya ◽  
Belgudri Ritesh Appasaheb ◽  
Ramdas Bhanudas Khaladkar ◽  
V. S. Kanchana Bhaaskaran

Multiplier forms the core building block of any processor, such as the digital signal processor (DSP) and a general purpose microprocessor. As the word length increases, the number of adders or compressors required for the partial product addition also increases. The addition operation of the derived partial products determines the circuit latency, area and speed performance of wider word-length multipliers. Binary count multiplier (BCM) aims to reduce the number of adders and compressors through the use of a uniquely structured binary counter and by suitably altering the logical flow of partial product addition by using binary adders is proposed in this paper. The binary counters for varying bit count values are derived by modifying the basic 4:2 compressor circuit. A [Formula: see text] bit multiplier has been developed to validate the proposed computation method. This logic structure demonstrates lower power operation, reduced device count and lesser delay in comparison against the conventional Wallace tree multiplier structure found in the literature. The BCM implementation realizes 29.17% reduction in the device count, 66% reduction in the delay and 70% reduction in the power dissipation. Furthermore, it realizes 90% reduction in the power delay product (PDP) in comparison against the Wallace tree structure. The multiplier circuits have been implemented and the validation of results has been carried out using Cadence[Formula: see text] EDA tool. Forty five nanometer technology files have been employed for the designs and exhaustive SPICE simulations.


2014 ◽  
Vol 945-949 ◽  
pp. 1752-1755
Author(s):  
Chui Xin Chen ◽  
Yang Hong Mao

The real-time processing for the input analog audio signal, audio processing program is proposed based on DSP. The system use FFT algorithm as the core, first, the input analog audio signal is sampled and A/D conversion using TLV320AIC23, and then use high speed digital signal processor to make real-time processing for the signal. Theoretical and experimental results show that the system can meet the design requirements, it has the advantage of high real-time and simple structure. The system has a good application and reference value for the development and design of data collecting and remote monitoring.


2014 ◽  
Vol 598 ◽  
pp. 583-586
Author(s):  
Ping Wang ◽  
Gui Zhi Xu ◽  
Lei Wang ◽  
Cheng Long Liu

The core device of our system is a handheld EEG monitoring analyzer, which is based on a new DSP (Digital Signal Processor) control system. The DSP is based on a Think-Gear module and collects the EEG signals reliably. The system only uses a dry electrode, which ensures that the user can have a happy experience in daily life. Our main purpose is that we can provide a hardware prototype with the application of BCI (Brain-Computer Interface).The system can monitor the sleep process accurately and distinguish the eyes open or closed state, sleep state and the degree of relaxation.


2020 ◽  
Vol 8 (5) ◽  
pp. 4073-4079

For continuous monitoring of individual wellbeing, wearable devices are indispensable. The limitations of cost, utilization of power, delay and restricted device measurements are the basic issues which should be dealt cautiously while designing these battery powered devices. The wearables use high-end processors dedicated for complicated signal processing. Data path plays a key role in every digital signal processor. Adder is the most widely used component in wearable technology. This work proposes a novel architecture for PS0 pipelined adder. The proposed adder is implemented in 65nm TSMC CMOS and its performance has been compared with state-of-art adders. The SPICE level simulations are performed on HSPICE using 65nm TSMC CMOS @ 1.2 V. All the designs have been simulated with extracted wire and layout parasitics. The proposed adder ensures the lowest propagation delay which is 79.33% less when compared to RCA and has a power dissipation of 0.225 mw which is 25.4 % less as compared to CLA. Besides, the proposed adder offers a benefit of having lower transistor count which is 49.6% less as compared to RCA.


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