On the Electrical Characterization of High-ĸ Dielectrics

MRS Bulletin ◽  
2002 ◽  
Vol 27 (3) ◽  
pp. 222-225 ◽  
Author(s):  
R. Degraeve ◽  
E. Cartier ◽  
T. Kauerauf ◽  
R. Carter ◽  
L. Pantisano ◽  
...  
Keyword(s):  
Electrical Properties ◽  
Electrode Materials ◽  
Gate Dielectric ◽  
Electrical Characterization ◽  
Complementary Metal Oxide Semiconductor ◽  
Dielectric Materials ◽  
Oxide Semiconductor ◽  
High Q ◽  
New Si

AbstractThe continual scaling of complementary metal oxide semiconductor (CMOS) technologies has pushed the Si-SiO2 system to its very limits and has led to the consideration of a number of alternative high-ĸ gate dielectric materials. In the end, it will be the electrical properties of the new Si/high-ĸ system that will determine its usefulness in future CMOS generations. For this reason, the study of the electrical properties of high-ĸ gate insulators is crucial. We present an overview of some of the electrical characterization techniques and reliability tests used to evaluate possible high-ĸ gate materials. Most of these techniques are well known from the characterization of SiO2 layers, but there are some additional complications, such as the presence of several different layers within one gate stack or the use of different gate electrode materials. These make the interpretation and comparison of experimental results more troublesome.

MBE Growth of Oxides for III–N MOSFETs

1999 ◽  
Vol 573 ◽  
Author(s):  
B. Gila ◽  
K N. Lee ◽  
J Laroche ◽  
F Ren ◽  
S. M. Donovan ◽  
...  
Keyword(s):  
Thermal Stability ◽  
High Performance ◽  
Gate Dielectric ◽  
Field Effect Transistors ◽  
Electrical Characterization ◽  
Dielectric Materials ◽  
Interface State ◽  
Oxide Semiconductor ◽  
Good Thermal Stability ◽  
Deposition Conditions

ABSTRACTReproducible fabrication of high performance metal oxide semiconductor field effect transistors (MOSFETs) from compound semiconductors will require both good interfacial electrical characteristics and good thermal stability. While dielectrics such as SiO2, AIN, and GdGaOx have demonstrated low to moderate interface state densities, questions remain about their thermal stability and reliability, particularly for use in high power or high temperature widebandgap devices. In this paper we will compare the utility of two potential gate dielectric materials: GdOx and GaOx. GdOx has been found to produce layers with excellent surface morphologies as evidenced by surface roughness of less than I nm. Stoichiometric films can be easily obtained over a range of deposition conditions, though deposition temperatures of 500°C appear to offer the optimum interfacial electrical quality. By contrast GaOx films are quite rough, polycrystalline and show poor thermal stability. Further they exhibit a range of stoichiometries depending upon deposition temperature, Ga flux and oxygen flux. This paper will describe the relationship between deposition conditions and film characteristics for both materials, and will present electrical characterization of capacitors fabricated from GdOx on Si.

Electrical Characterization of MOS Structures with Silicon Nanocrystals Suitable for X-Ray Detection

2013 ◽  
Vol 543 ◽  
pp. 150-153
Author(s):  
David Mateos ◽  
Nicola Nedev ◽  
Diana Nesheva ◽  
Mario Curiel ◽  
Emil Manolov ◽  
...  
Keyword(s):  
Silicon Nanocrystals ◽  
Gate Dielectric ◽  
Defect Density ◽  
Electrical Characterization ◽  
Oxide Semiconductor ◽  
Electrical Measurements ◽  
Transmission Electron ◽  
Interface Defect ◽  
Mos Structures

Metal-Oxide-Semiconductor structures with silicon nanocrystals in the oxide layer are prepared and characterized by Transmission Electron Microscopy and electrical measurements. High temperature annealing of SiO1.15 films at 1000 °C for 30 or 60 min leads to formation of silicon nanocrystals with diameters of 2-3 or 4-6 nm. The processes used to obtain the multilayer gate dielectric and to grow nanocrystals do not deteriorate the properties of the cSi wafer/thermal SiO2 interface. For the interface defect density and the fixed oxide charge values 1010 cm-2 eV-1 and ~ 1010 cm-2 were obtained.

scholarly journals Research Progress of High Dielectric Constant Zirconia-Based Materials for Gate Dielectric Application

Coatings ◽  
2020 ◽  
Vol 10 (7) ◽  
pp. 698
Author(s):  
Junan Xie ◽  
Zhennan Zhu ◽  
Hong Tao ◽  
Shangxiong Zhou ◽  
Zhihao Liang ◽  
...  
Keyword(s):  
Thin Film ◽  
Dielectric Constant ◽  
Electrical Properties ◽  
High Dielectric Constant ◽  
Gate Dielectric ◽  
Semiconductor Device ◽  
Dielectric Materials ◽  
Oxide Semiconductor ◽  
Research Progress ◽  
High Dielectric

The high dielectric constant ZrO2, as one of the most promising gate dielectric materials for next generation semiconductor device, is expected to be introduced as a new high k dielectric layer to replace the traditional SiO2 gate dielectric. The electrical properties of ZrO2 films prepared by various deposition methods and the main methods to improve their electrical properties are introduced, including doping of nonmetal elements, metal doping design of pseudo-binary alloy system, new stacking structure, coupling with organic materials and utilization of crystalline ZrO2 as well as optimization of low-temperature solution process. The applications of ZrO2 and its composite thin film materials in metal oxide semiconductor field effect transistor (MOSFET) and thin film transistors (TFTs) with low power consumption and high performance are prospected.

Electrical Characterization of the Graphene-SiC Heterojunction

2012 ◽  
Vol 717-720 ◽  
pp. 641-644
Author(s):  
Travis J. Anderson ◽  
Karl D. Hobart ◽  
Luke O. Nyakiti ◽  
Virginia D. Wheeler ◽  
Rachael L. Myers-Ward ◽  
...  
Keyword(s):  
Electrical Properties ◽  
Charge Carrier ◽  
Graphene Sheet ◽  
Carrier Transport ◽  
Electrical Characterization ◽  
Epitaxial Graphene ◽  
Charge Carrier Transport ◽  
Semiconductor System ◽  
Significant Research

Graphene, a 2D material, has motivated significant research in the study of its in-plane charge carrier transport in order to understand and exploit its unique physical and electrical properties. The vertical graphene-semiconductor system, however, also presents opportunities for unique devices, yet there have been few attempts to understand the properties of carrier transport through the graphene sheet into an underlying substrate. In this work, we investigate the epitaxial graphene/4H-SiC system, studying both p and n-type SiC substrates with varying doping levels in order to better understand this vertical heterojunction.

Characterization of High-Performance Polycrystalline Silicon Complementary Metal–Oxide–Semiconductor Circuits

2007 ◽  
Vol 46 (1) ◽  
pp. 51-55 ◽  
Author(s):  
Genshiro Kawachi ◽  
Yoshiaki Nakazaki ◽  
Hiroyuki Ogawa ◽  
Masayuki Jyumonji ◽  
Noritaka Akita ◽  
...  
Keyword(s):  
Metal Oxide ◽  
Polycrystalline Silicon ◽  
High Performance ◽  
Complementary Metal Oxide Semiconductor ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Semiconductor Circuits

scholarly journals STRUCTURAL AND ELECTRICAL PROPERTIES OF TANTALUM PENTAOXIDE (Ta2O5) THIN FILMS – A REVIEW

2013 ◽  
Vol 22 ◽  
pp. 564-569
Author(s):  
KANTA RATHEE ◽  
B. P. MALIK
Keyword(s):  
Thin Films ◽  
Dielectric Constant ◽  
Electrical Properties ◽  
Metal Oxide ◽  
High Dielectric Constant ◽  
Complementary Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Structural And Electrical Properties ◽  
High Dielectric ◽  
Deposited Films

Down scaling of complementary metal oxide semiconductor transistors has put limitations on silicon dioxide to be used as an effective dielectric. It is necessary to replace the SiO 2 with a physically thicker layer of oxides of high dielectric constant. Thus high k dielectrics are used to suppress the existing challenges for CMOS scaling. Many new oxides are being evaluated as gate dielectrics such as Ta2O5 , HfO2 , ZrO2 , La2O3 , HfO2 , TiO2 , Al2O3 , Y2O3 etc but it was soon found that these oxides in many respects have inferior electronic properties to SiO2 . But the the choice alone of suitable metal oxide with high dielectric constant is not sufficient to overcome the scaling challenges. The various deposition techniques and the conditions under which the thin films are deposited plays important role in deciding the structural and electrical properties of the deposited films. This paper discusses in brief the various deposition conditions which are employed to improve the structural and electrical properties of the deposited films.

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