Electrical Characterization of MOS Structures with Silicon Nanocrystals Suitable for X-Ray Detection

2013 ◽  
Vol 543 ◽  
pp. 150-153
Author(s):  
David Mateos ◽  
Nicola Nedev ◽  
Diana Nesheva ◽  
Mario Curiel ◽  
Emil Manolov ◽  
...  
Keyword(s):  
Silicon Nanocrystals ◽  
Gate Dielectric ◽  
Defect Density ◽  
Electrical Characterization ◽  
Oxide Semiconductor ◽  
Electrical Measurements ◽  
Transmission Electron ◽  
Interface Defect ◽  
Mos Structures

Metal-Oxide-Semiconductor structures with silicon nanocrystals in the oxide layer are prepared and characterized by Transmission Electron Microscopy and electrical measurements. High temperature annealing of SiO1.15 films at 1000 °C for 30 or 60 min leads to formation of silicon nanocrystals with diameters of 2-3 or 4-6 nm. The processes used to obtain the multilayer gate dielectric and to grow nanocrystals do not deteriorate the properties of the cSi wafer/thermal SiO2 interface. For the interface defect density and the fixed oxide charge values 1010 cm-2 eV-1 and ~ 1010 cm-2 were obtained.

On the Electrical Characterization of High-ĸ Dielectrics

MRS Bulletin ◽  
2002 ◽  
Vol 27 (3) ◽  
pp. 222-225 ◽  
Author(s):  
R. Degraeve ◽  
E. Cartier ◽  
T. Kauerauf ◽  
R. Carter ◽  
L. Pantisano ◽  
...  
Keyword(s):  
Electrical Properties ◽  
Electrode Materials ◽  
Gate Dielectric ◽  
Electrical Characterization ◽  
Complementary Metal Oxide Semiconductor ◽  
Dielectric Materials ◽  
Oxide Semiconductor ◽  
High Q ◽  
New Si

AbstractThe continual scaling of complementary metal oxide semiconductor (CMOS) technologies has pushed the Si-SiO2 system to its very limits and has led to the consideration of a number of alternative high-ĸ gate dielectric materials. In the end, it will be the electrical properties of the new Si/high-ĸ system that will determine its usefulness in future CMOS generations. For this reason, the study of the electrical properties of high-ĸ gate insulators is crucial. We present an overview of some of the electrical characterization techniques and reliability tests used to evaluate possible high-ĸ gate materials. Most of these techniques are well known from the characterization of SiO2 layers, but there are some additional complications, such as the presence of several different layers within one gate stack or the use of different gate electrode materials. These make the interpretation and comparison of experimental results more troublesome.

Radiation Dosimeter Based on Metal-Oxide-Semiconductor Structures Containing Silicon Nanocrystals

2011 ◽  
Vol 495 ◽  
pp. 120-123 ◽  
Author(s):  
Nicola Nedev ◽  
Emil Manolov ◽  
Diana Nesheva ◽  
Kiril Krezhov ◽  
Roumen Nedev ◽  
...  
Keyword(s):  
Silicon Nanocrystals ◽  
Gate Dielectric ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Linear Variation ◽  
Γ Irradiation ◽  
Semiconductor Structures ◽  
Flatband Voltage ◽  
Mos Structures ◽  
Higher Doses

MOS structures containing silicon nanocrystals in the gate dielectric have been tested as dosimeters for ionizing radiation. Before irradiation the nanocrystals have been charged with electrons by applying a pulse to the gate electrode. The γ-irradiation with doses in the range 0-100 Gy causes approximately linear variation of the flatband voltage, resulting in sensitivities of ~ 2.5 mV/Gy. At higher doses the sensitivity decreases because of decrease of the oxide electric field.

Electrical Characterization of Interface Defects in MOS Structures Containing Silicon Nanoclusters

2014 ◽  
Vol 976 ◽  
pp. 129-132 ◽  
Author(s):  
Abraham Arias ◽  
Nicola Nedev ◽  
Mario Curiel ◽  
Diana Nesheva ◽  
Emil Manolov ◽  
...  
Keyword(s):  
Electrical Characterization ◽  
Interface Roughness ◽  
Silicon Nanoclusters ◽  
Furnace Annealing ◽  
High Temperature Process ◽  
Transmission Electron ◽  
Si Nanoparticles ◽  
Mos Structures ◽  
Si Wafer

The effect of annealing temperature on the properties of c-Si wafer/SiOx interface (x = 1.15 and 1.3) is studied by Transmission Electron Microscopy and Capacitance/Conductance-Voltage measurements. Furnace annealing for 60 min at 700 and 1000 °C is used to grow amorphous or crystalline Si nanoparticles. The high temperature process leads to an epitaxial overgrowth of the Si wafer and an increase of the interface roughness, 3-4 monolayers at 700 °C and 4-5 monolayers at 1000 °C. The increased surface roughness is in correlation with the higher density of electrically active interface states.

Structural and Electrical Characterization of Si-Implanted TiN as a Diffusion Barrier for Cu Metallization

1995 ◽  
Vol 391 ◽  
Author(s):  
W.F. Mcarthur ◽  
K.M. Ring ◽  
K.L. Kavanagh
Keyword(s):  
Leakage Current ◽  
Diffusion Barrier ◽  
Depth Profiling ◽  
Electrical Characterization ◽  
Implantation Dose ◽  
Cu Metallization ◽  
Reverse Leakage Current ◽  
Transmission Electron ◽  
Current Voltage

AbstractThe feasibility of Si-implanted TiN as a diffusion barrier between Cu and Si was investigated. Barrier effectiveness was evaluated via reverse leakage current of Cu/TixSiyNz/Si diodes as a function of post-deposition annealing temperature and time, and was found to depend heavily on the film composition and microstructure. TiN implanted with Si28, l0keV, 5xl016ions/cm2 formed an amorphous ternary TixSiyNz layer whose performance as a barrier to Cu diffusion exceeded that of unimplanted, polycrystalline TiN. Results from current-voltage, transmission electron microscopy (TEM), and Auger depth profiling measurements will be presented. The relationship between Si-implantation dose, TixSiyNz structure and reverse leakage current of Cu/TixSiyNz/Si diodes will be discussed, along with implications as to the suitability of these structures in Cu metallization.

Characterization of HfO2/Si Exposed to Water Vapor at Room Temperature

2006 ◽  
Vol 917 ◽  
Author(s):  
Carlos Driemeier ◽  
Elizandra Martinazzi ◽  
Israel J. R. Baumvol ◽  
Evgeni Gusev
Keyword(s):  
Water Vapor ◽  
Metal Oxide ◽  
Room Temperature ◽  
Gate Dielectric ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Dielectric Films ◽  
Nuclear Reaction Analysis ◽  
Environmental Air

AbstractHfO2-based materials are the leading candidates to replace SiO2 as the gate dielectric in Si-based metal-oxide-semiconductor filed-effect transistors. The ubiquitous presence of water vapor in the environments to which the dielectric films are exposed (e.g. in environmental air) leads to questions about how water could affect the properties of the dielectric/Si structures. In order to investigate this topic, HfO2/SiO2/Si(001) thin film structures were exposed at room temperature to water vapor isotopically enriched in 2H and 18O followed by quantification and profiling of these nuclides by nuclear reaction analysis. We showed i) the formation of strongly bonded hydroxyls at the HfO2 surface; ii) room temperature migration of oxygen and water-derived oxygenous species through the HfO2 films, indicating that HfO2 is a weak diffusion barrier for these oxidizing species; iii) hydrogenous, water-derived species attachment to the SiO2 interlayer, resulting in detrimental hydrogenous defects therein. Consequences of these results to HfO2-based metal-oxide-semiconductor devices are discussed.

scholarly journals Characterization of Gaas/Si/GaAs Heterointerfaces

1989 ◽  
Vol 148 ◽  
Author(s):  
Zuzanna Liliental-Weber ◽  
Raymond P. Mariella
Keyword(s):  
Electron Microscopy ◽  
Transmission Electron Microscopy ◽  
Low Temperature ◽  
Defect Density ◽  
Si Substrate ◽  
Reverse Polarity ◽  
Si Substrates ◽  
Transmission Electron ◽  
Metal Semiconductor Metal

ABSTRACTTransmission electron microscopy of GaAs grown on Si for metal-semiconductor-metal photodetectors is presented in this paper. Two kinds of samples are compared: GaAs grown on a 15 Å Si epilayer grown on GaAs, and GaAs grown at low temperature (300°C) on Si substrates. It is shown that the GaAs epitaxial layer grown on thin Si layer has reverse polarity to the substrate (antiphase relation). Higher defect density is observed for GaAs grown on Si substrate. This higher defect density correlates with an increased device speed, but with reduced sensitivity.

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