Transient Annealing of Ion Implanted Gallium Arsenide

1982 ◽  
Vol 13 ◽  
Author(s):  
J.S. Williams

ABSTRACTThis paper provides a brief overview of the application of transient annealing to the removal of ion implantation damage and dopant activation in GaAs. It is shown that both the liquid phase and solid phase annealing processes are more complex in GaAs than those observed in Si. Particular attention is given to observations of damage removal, surface dissociation, dopant redistribution, solubility and the electrical properties of GaAs. The various annealing mechanisms are discussed and areas in need of further investigation are identified.

1983 ◽  
Vol 23 ◽  
Author(s):  
J. Narayan

ABSTRACTWe have investigated the annealing of ion implantation damage (in the form of amorphous layers and/or the layers containing only dislocation loops) in silicon and gallium arsenide. The annealing of amorphous layers occurs by solid-phase-epitaxial growth and that of dislocation loops involves primarily loop-coalescence as a result of conservative climb and glide processes. The annealing of disolated loops occurs primarily by a bulk diffusion process. Almost a “complete” annealing of displacement damage is possible for shallow implants provided loop–coalescence does not lead to the formation of cross–grid of dislocations. For deep implants, the free surface cannot provide an effective sink for defects as in the case of shallow implants. Dopant profiles can be controlled to less than 1000 Å in layers having good electrical properties. The enhanced diffusion of dopants is observed probably due to entrapment of point defects in the annealed regions.


1980 ◽  
Vol 1 ◽  
Author(s):  
T. O. Yep ◽  
R. T. Fulks ◽  
R. A. Powell

ABSTRACTSuccessful annealing of p+ n arrays fabricated by ion-implantation of 11B (50 keV, 1 × 1014 cm-2) into Si (100 has been performed using a broadly rastered, low-resolution (0.25-inch diameter) electron beam. A complete 2" wafer could be uniformly annealed in ≃20 sec with high electrical activation (>75%) and small dopant redistribution (≃450 Å). Annealing resulted In p+n junctions characterized by low reverse current (≃4 nAcm-2 at 5V reverse bias) and higher carrier lifetime (80 μsec) over the entire 2" wafer. Based on the electrical characteristics of the diodes, we estimate that the electron beam anneal was able to remove ion implantation damage and leave an ordered substrate to a depth of 5.5 m below the layer junction.


1980 ◽  
Vol 1 ◽  
Author(s):  
J. S. Williams ◽  
H. B. Harrison

ABSTRACTThis review examines the annealing behaviour of ion implanted gallium arsenide during furance, laser and e-beam processing.The two annealing regimes, namely solid phase regrowth via furnace or CW laser/e-beam annealing and liquid phase epitaxy produced by pulsed lasers/e-beam, are examined in some detail.Emphasis is placed upon an understanding of the physical processes which are important during the various annealing modes.Comparison with the annealing behaviour of ion implantedelemental semiconductors(notably silicon) is made throughout the review to highlight relevant similarities and differences between compound and elemental semiconductors.The electrical properties of annealed gallium arsenide layers are not treatedin any detail, although particular observations which are relevant to the annealing processes are briefly discussed.


1976 ◽  
Vol 29 (11) ◽  
pp. 698-699 ◽  
Author(s):  
C. O. Bozler ◽  
J. P. Donnelly ◽  
W. T. Lindley ◽  
R. A. Reynolds

2002 ◽  
Vol 16 (28n29) ◽  
pp. 4234-4237
Author(s):  
XUEQIN LIU ◽  
CONGMIAN ZHEN ◽  
YINYUE WANG ◽  
JING ZHANG ◽  
YUEJIAO PU ◽  
...  

Si 0.875-y Ge 0.125 C y ternary alloy films were grown on Si by ion implantation of C into Si 0.875 Ge 0.125 layers and subsequent solid phase epitaxy. It was shown that C atoms were nearly incorporated into substitutional sites and no SiC was formed in the SiGeC films by optimal two-step annealing. There is a prominent effect of C contents on carrier transport properties. Compared with strained Si 0.875 Ge 0.125 film, enhanced Hall mobility has been obtained in partially and fully strain compensated Si 0.875-y Ge 0.125 C y layer due to the reduction of lattice strain.


1993 ◽  
Vol 316 ◽  
Author(s):  
Craig Jasper ◽  
Scott Klingbeil ◽  
K.S. Jones ◽  
H.G. Robinson

ABSTRACTControl of threshold voltage during gallium arsenide (GaAs) Metal Semiconductor Field Effect Transistor (MESFET) processing is critical. Channel formation typically is done using ion implantation of 29Si+ from a SiF4 source. The use of Si+ presents a variety of potential cross-contamination problems. 28Si+ and 30Si+ beams can become contaminated with 28N2+, 28CO+, and 30NO+. While 29Si+ is relatively pure, the abundance of 29Si+ in the mass spectrum is 4.67%, thus reducing the potential beam current. This study investigates the effects of varying the mass resolving power of an Eaton 6200AV implanter on the electrical parameters and defect formation. The mass resolving power was adjusted by changing the mean path size through the slit of the aperture opening and magnetic separator current. Electrical device characterization measured a small shift in saturated source-drain current (Idss) and break down voltage, while threshold voltage shifts of approximately 80 mV were observed, with the various mass resolution powers. Transmission Electron Microscopy (TEM) showed that there is minimal change in the extended defect density with changes in isotope and aperture opening. Secondary Ion Mass Spectrometry (SIMS) measured the amount of cross contamination and these results correlated well with the observed changes in device electrical properties.


1980 ◽  
Vol 1 ◽  
Author(s):  
J. C. C. Fan ◽  
R. L. Chapman ◽  
J. P. Donnelly ◽  
G. W. Turner ◽  
C. O. Bozler

ABSTRACTA scanned cw Nd: YAG laser was used to anneal ion-implanted GaAs and InP wafers. Measurements show that electrical activation is greater for p-type than for n-type dopants in GaAs, while in InP, the opposite is observed. A simple Fermi-level pinning model is presented to explain not only the electrical properties we have measured, but also those observed by other workers. We have fabricated GaAs and InP solar cells with junctions formed by ion implantation followed by laser annealing. The GaAs cells have much better conversion efficiencies than the InP cells, and this difference can be explained in terms of the model.


1989 ◽  
Vol 161 ◽  
Author(s):  
M. H. Jin ◽  
K. M. James ◽  
C. E. Jones ◽  
J. L. Merz

ABSTRACTThis is the first reported use of ion-implantation damage gettering of impurities in CdTe to provide high-quality substrates for the epitaxial growth of appropriate binary or ternary compounds, or for related applications. We describe the results of photoluminescence (PL) measurements performed on samples of Bridgeman-grown CdTe to study both the annealing behavior and gettering effects in this material. From the PL results, it was found that impurity gettering occurs at temperatures at which liquid phase epitaxy take place (∼500°C) so that these two fabrication procedures are compatible. It was also found that the optimum anneal time at this temperature is four hours.


2021 ◽  
Author(s):  
Toshiyuki Tabata ◽  
Fabien Roze ◽  
Pablo Acosta Alba ◽  
Sebastien Halty ◽  
Pierre-Edouard Raynal ◽  
...  

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