Comparison of the Density and Distribution of Traps Generated by High Voltage Stress in Silicon Oxide and Silicon Oxynitrides

1992 ◽  
Vol 284 ◽  
Author(s):  
J. T. Richardson ◽  
D. J. Dumin ◽  
G. Q. Lo ◽  
D. L. Kwong ◽  
B. J. Gross ◽  
...  

ABSTRACTA technique has been developed to determine the density and distribution of spatially deep traps throughout an insulator. These traps were created and charged by a high voltage stressing pulse and allowed to discharge upon the removal of the pulse. During the transient following pulse removal, the currents were measured. A correlation from current to trap densities and from time of decay to location within the dielectric has been made. This method has been applied to gauge the differences between nitrided dielectrics and thermal oxides. We have found initial trap levels, before stressing, to be lower in silicon oxide devices than silicon oxynitride devices. However, trap levels increased faster in thermal oxides as the stress increased, and became larger than the levels found in nitrided oxides. Nitrided devices tended to resist additional trap formation. Current-voltage measurements have shown that nitrides developed higher leakage currents as the stress was increased than did thermal oxides.

1996 ◽  
Vol 43 (7) ◽  
pp. 1133-1143 ◽  
Author(s):  
R.S. Scott ◽  
N.A. Dumin ◽  
T.W. Hughes ◽  
D.J. Dumin ◽  
B.T. Moore

1992 ◽  
Vol 284 ◽  
Author(s):  
D. J. Dumin ◽  
J. R. Maddux

ABSTRACTAfter thin silicon oxide films were stressed at high voltages, two changes occurred in the current-voltage and transient current characteristics of the films. The low-level, pre-tunneling current rose and the transient decay of the current after removal of a voltage pulse changed from an exponential RC time constant decay to a very long decay that was characterized by a 1/t time dependence. Using an extension of the tunneling front discharge model, previously developed to describe the transient changes in the threshold voltages of transistors after avalanche injection or irradiation, the 1/t time dependence was derived. This 1/t transient discharge current was used to determine the density and distribution of the traps inside of the oxide after the high voltage stress. The technique and model used for determining the trap densities and distributions from the transient currents will be described. The model was used to describe the charging of traps in the oxide.


1992 ◽  
Vol 284 ◽  
Author(s):  
Ronald S. Scott ◽  
David J. Dumin

ABSTRACTThe tunnelling front model has been used to obtain the spatial distribution of high-voltage, stress generated traps inside of MOS capacitors. It was found that the number of traps created by high voltage stress was proportional to the cube root of the fluence through the oxide during the stress. Measurement of the trap generation rate indicated that fewer traps were being created as higher amounts of charge were passed through the oxide. Further tests indicated that there was a voltage dependence to the trap generation which was independent of stress polarity.


2013 ◽  
Vol 740-742 ◽  
pp. 877-880 ◽  
Author(s):  
Pavel A. Ivanov ◽  
Igor V. Grekhov ◽  
Alexander S. Potapov ◽  
Natalya D. Il'inskaya ◽  
Oleg I. Kon'kov ◽  
...  

High-voltage 4H-SiC Schottky Barrier Diodes (SBDs) and Junction Barrier Schottky (JBS) diodes have been fabricated and evaluated. Current-voltage (I-V) characteristics were measured in a wide temperature range. All diodes fabricated showed nearly ideal forward behavior. For SBDs with Schottky Barrier Height (SBH) of 1.12 eV, the reverse I–V characteristics are described well by the thermionic emission model (at voltages varying from several mV to 2 kV and temperatures ranging from 361 to 470 K) if barrier lowering with increasing band bending is taken into account. For SBDs with SBH of 1.53 eV, no thermionic current was detected in reverse direction at temperatures below ~500 K. The leakage currents appeared only at high reverse voltages and elevated temperatures. The analysis of reverse I-V characteristics allowed to propose dislocation related mechanism of current flow due to the local injection of electrons from metal to semiconductor. It is shown that defect related leakage currents can be significantly reduced by JBS-structure.


Processes ◽  
2021 ◽  
Vol 9 (7) ◽  
pp. 1112
Author(s):  
Yu-En Wu ◽  
Jyun-Wei Wang

This study developed a novel, high-efficiency, high step-up DC–DC converter for photovoltaic (PV) systems. The converter can step-up the low output voltage of PV modules to the voltage level of the inverter and is used to feed into the grid. The converter can achieve a high step-up voltage through its architecture consisting of a three-winding coupled inductor common iron core on the low-voltage side and a half-wave voltage doubler circuit on the high-voltage side. The leakage inductance energy generated by the coupling inductor during the conversion process can be recovered by the capacitor on the low-voltage side to reduce the voltage surge on the power switch, which gives the power switch of the circuit a soft-switching effect. In addition, the half-wave voltage doubler circuit on the high-voltage side can recover the leakage inductance energy of the tertiary side and increase the output voltage. The advantages of the circuit are low loss, high efficiency, high conversion ratio, and low component voltage stress. Finally, a 500-W high step-up converter was experimentally tested to verify the feasibility and practicability of the proposed architecture. The results revealed that the highest efficiency of the circuit is 98%.


1996 ◽  
Vol 424 ◽  
Author(s):  
S. D. Theiss ◽  
S. Wagner

AbstractWe describe the successful fabrication of device-quality a-Si:H thin-film transistors (TFTs) on stainless-steel foil substrates. These TFTs demonstrate that transistor circuits can be made on a flexible, non-breakable substrate. Such circuits could be used in reflective or emissive displays, and in other applications that require rugged macroelectronic circuits.Two inverted TFT structures have been made, using 200 gim thick stainless steel foils with polished surfaces. In the first structure we used the substrate as the gate and utilized a homemade mask set with very large feature sizes: L = 45 μm; W = 2.5 mm. The second, inverted staggered, structure used a 9500 Å a-SiNx:H passivating/insulating layer deposited on the steel to enable the use of isolated gates. For this structure we used a mask set which is composed of TFTs with much smaller feature sizes. Both TFT structures exhibit transistor action. Current-voltage characterization of the TFTs with the inverted staggered structure shows typical on/off current ratios of 107, leakage currents on the order of 10-12 A, good linear and saturation current behavior, and channel mobilities of 0.5 cm2/V·sec. These characteristics clearly identify the TFTs grown on stainless steel foil as being of device quality.


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