Integrated Rapid Thermal CVD Processing Solutions for 0.18–0.25μm Technologies

1997 ◽  
Vol 470 ◽  
Author(s):  
H. Gilboa ◽  
Y. E. Gilboa ◽  
Z. Atzmon ◽  
S. Levy ◽  
H. Spilberg ◽  
...  
Keyword(s):  
High Temperature ◽  
Flash Memory ◽  
Thermal Processing ◽  
Rapid Thermal Processing ◽  
Chemical Vapor ◽  
Wafer Cleaning ◽  
Front End ◽  
Wafer Processing ◽  
Cluster Tool ◽  
Temperature Applications

ABSTRACTThe evolution of integrated single-wafer processing for high-temperature applications in the front end of the line (FEOL) occurred with the advancements in single-wafer rapid thermal processing and its acceptance as a manufacturing technology. The Integra RTCVD cluster tool for high-temperature applications features wafer cleaning, rapid thermal processing and single wafer chemical vapor deposition steps. The paper presents integrated vapor phase clean and RTCVD applications for FLASH memory gate stack and DRAM cell.

Si and GexSi1−x Epitaxial Growth on SOI Structures by Rapid Thermal Processing Chemical Vapor Deposition

1991 ◽  
Vol 224 ◽  
Author(s):  
T. Y. Hsieh ◽  
K. H. Jung ◽  
D. L. Kwong ◽  
S. Lin ◽  
H. L. Marcus
Keyword(s):  
High Temperature ◽  
Epitaxial Growth ◽  
Vapor Deposition ◽  
Thermal Processing ◽  
Rapid Thermal Processing ◽  
Chemical Vapor ◽  
Threading Dislocation ◽  
Dislocation Densities ◽  
Short Time ◽  
Defect Densities

AbstractA short time high temperature H2 pre-bake resulted in an undulating SIMOX surface, which planarized after epitaxial growth by rapid thermal processing chemical vapor deposition (RTPCVD). However, a short time, high temperature N2 pre-bake resulted in severe surface pitting. From dilute Schimmel etch results, no significant changes in the defect densities of the Si layers occurred after RTPCVD. Auger depth profiles of the SOI substrate prior to epitaxial growth show an oxygen peak in the SIMOX Si layer. However, the peak flattens out after epitaxial growth. Oxygen was not observed in the epitaxial film, even though oxygen was still observed in the SIMOX top Si layer.The use of GexSi1−x epitaxial layers to reduce threading dislocation densities was examined. A 1000°C Si buffer layer was first grown for 30s, followed by a GexSi1−x layer, and topped off by a 1000°C Si layer for 120s. The GexSi1−x layers were grown at temperatures varying from 850°C to 1000°C for 30s to 240s. The defect density was significantly reduced when the 900°C and 850°C GexSi1−x layers were used, although an increase in stacking fault densities (still small compared to threading dislocation densities) accompanied the lower deposition temperatures. The 1000°C GexSi1−x layer and a control sample in which pure Si was grown showed no significant decrease in defect densities.

A Mixed-Signal BiCMOS Front-End Signal Processor for High-Temperature Applications

2006 ◽  
Vol 41 (7) ◽  
pp. 1638-1647 ◽  
Author(s):  
O. Vermesan ◽  
L.-C.J. Blystad ◽  
R. Bahr ◽  
M. Hjelstuen ◽  
L. Beneteau ◽  
...  
Keyword(s):  
High Temperature ◽  
Mixed Signal ◽  
Front End ◽  
Signal Processor ◽  
Temperature Applications

Commercial RTP-A SEMATECH Perspective

1996 ◽  
Vol 429 ◽  
Author(s):  
Tony Speranza ◽  
Terry Riley ◽  
Arun Nanda ◽  
Burt Fowler ◽  
Kenneth Torres ◽  
...  
Keyword(s):  
Process Control ◽  
Thermal Processing ◽  
Semiconductor Manufacturing ◽  
Rapid Thermal Processing ◽  
Component Technology ◽  
Tool Development ◽  
Productivity Improvement ◽  
The Past ◽  
Vertical Furnace ◽  
Cluster Tool

AbstractThis paper discusses various commercial aspects of Rapid Thermal Processing (RTP). It provides an overview of SEMATECH's efforts to improve the manufacturing viability of RTP. Over the past several years SEMATECH, a U.S. Government/Industry consortium, has identified thermal equipment and processing needs relating to semiconductor manufacturing. It has aggressively pursued solutions to these needs through specific equipment projects. These projects include: RTP Installed Base Productivity Improvement, 0.25um RTP Tool Development, and RTP Modeling and Component Technology. Also discussed are several thermal projects which focus on the performance of more traditional tools. A comparison between RTP and a vertical furnace with model based process control and a small batch fast ramp furnace is made. A brief discussion of an RTP gate stack cluster tool project is followed by a review of future thermal processing needs, including 300mm.

Rapid Thermal Processes for Future Nanometer MOS Devices

1998 ◽  
Vol 525 ◽  
Author(s):  
John R. Hauser
Keyword(s):  
Thermal Processing ◽  
Gate Dielectric ◽  
Rapid Thermal Processing ◽  
Dielectric Materials ◽  
Nanometer Scale ◽  
Thermal Processes ◽  
Contact Material ◽  
Mos Devices ◽  
Front End ◽  
Projected Changes

ABSTRACTScaling of MOS devices is projected to continue down to device dimensions of at least 50 nm. However, there are many potential roadblocks to achieving such dimensions and many standard materials and front-end processes which must be significantly changed to achieve these goals. The most important areas for change include (a) gate dielectric materials, (b) gate contact material, (c) source/drain contacting structure and (d) fundamental bulk CMOS structure. These projected changes are reviewed along with possible applications of rapid thermal processing to achieving future nanometer scale MOS devices.

Thermoelectric Properties of Er-doped InGaN Alloys for High Temperature Applications

2011 ◽  
Vol 1325 ◽  
Author(s):  
K. Aryal ◽  
I. W. Feng ◽  
B. N. Pantha ◽  
J. Li ◽  
J. Y. Lin ◽  
...  
Keyword(s):  
High Temperature ◽  
Room Temperature ◽  
Chemical Vapor ◽  
Organic Chemical ◽  
Metal Organic ◽  
Er Doped ◽  
Organic Chemical Vapor Deposition ◽  
Co Doped ◽  
Ingan Alloys ◽  
Temperature Applications

ABSTRACTThermoelectric (TE) properties of erbium-silicon co-doped InxGa1-xN alloys (InxGa1-xN: Er + Si, 0≤x≤0.14), grown by metal organic chemical vapor deposition, have been investigated. It was found that doping of InGaN alloys with Er atoms of concentration, N[Er] larger than 5x1019 cm-3, has substantially reduced the thermal conductivity, κ, in low In content InGaN alloys. It was observed that κ decreases as N[Er] increases in Si co-doped In0.10Ga0.90N alloys. A room temperature ZT value of ~0.05 was obtained in In0.14Ga0.86N: Er + Si, which is much higher than that obtained in un-doped InGaN with similar In content. Since low In content InGaN is stable at high temperatures, these Er+Si co-doped InGaN alloys could be promising TE materials for high temperature applications.

Microscale Radiation Effects in Multilayer Thin-Film Structures During Rapid Thermal Processing

1993 ◽  
Vol 303 ◽  
Author(s):  
Peter Y. Wong ◽  
Christopher K. Hess ◽  
Ioannis N. Miaoulis
Keyword(s):  
Thin Film ◽  
Numerical Model ◽  
Thermal Processing ◽  
Radiation Effects ◽  
Rapid Thermal Processing ◽  
Chemical Vapor ◽  
Film Structure ◽  
Transient Temperature ◽  
Multilayered Structures ◽  
Temperature Distributions

ABSTRACTThe individual film thicknesses of multilayered structures processed by rapid thermal processing are of the same order as the wavelengths of the incident radiation. This induces optical interference effects which are responsible for the strong dependency of surface reflectivity, emissivity, and temperature distributions on the geometry of the layering structures, presence of patterns, and thickness of the films. A two-dimensional, finitedifference numerical model has been developed to investigate this microscale radiation phenomena and identify the critical processing parameters which affect rapid thermal processing of multilayer thin films. The uniformity of temperature distributions throughout the wafer during rapid thermal processing is directly affected by incident heater configurations, ramping conditions, wafer-edge effects, and thin-film layering structure. Results from the numerical model for various film structures are presented for chemical vapor deposition of polycrystalline silicon over oxide films on substrate. A novel technique using an edge-enhanced wafer which has a different film structure near its edge is presented as a control over the transient temperature distribution.

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