A Memory Device Utilizing Resonant Tunneling in Nanocrystalline Silicon Superlattices

2000 ◽  
Vol 638 ◽  
Author(s):  
Laurent Montès ◽  
Galina F. Grom ◽  
Rishi Krishnan ◽  
Philippe M. Fauchet ◽  
Leonid Tsybeskov ◽  
...  
Keyword(s):  
Resonant Tunneling ◽  
Room Temperature ◽  
Electron Tunneling ◽  
Silicon Layer ◽  
Nanocrystalline Silicon ◽  
Memory Device ◽  
Hot Electron ◽  
Non Volatile Memory ◽  
Silicon Nanocrystallites ◽  
Size Dispersion

AbstractA quantum structure based on Si/SiO2 and fabricated using standard Si technology has strong potential for applications in non-volatile and scaled dynamic memories. Among standard requirements, such as long retention time and endurance, a structure utilizing resonant tunneling offers lower bias operation and faster write/read cycle. In addition, degradation effects associated with Fowlher-Nordheim (FN) hot electron tunneling can be avoided. Superlattices of nanometer size layers of silicon and silicon dioxide were obtained by sputtering. The size of the silicon nanocrystallites (nc-Si) is fixed by the thickness of the silicon layer which limits the size dispersion. A detailed analysis of the storage of charges in the dots, as a function of the nanocrystals size, is investigated using capacitance methods. Constant voltage and constant capacitance techniques are used to monitor the discharge of the structure. Room temperature non-volatile memory with retention times as long as months is evidenced.

Observation of Coulomb Blockade Effect in Silicon Nanocrystallites at room Temperature

1997 ◽  
Vol 467 ◽  
Author(s):  
Xiaofeng Gu ◽  
Hua Qin ◽  
Hai Lu ◽  
Jun Xu ◽  
Kunji Chen
Keyword(s):  
Coulomb Blockade ◽  
Resonant Tunneling ◽  
Room Temperature ◽  
Silicon Oxide ◽  
Nanocrystalline Silicon ◽  
Tunneling Diode ◽  
Average Grain Size ◽  
High Resolution Tem ◽  
Silicon Nanocrystallites ◽  
Double Barrier Resonant Tunneling

ABSTRACTWe report the fabrication and electrical characteristics of an ultrathin nanocrystalline-silicon/amorphous silicon oxide double barrier resonant tunneling diode. The cross-section high resolution TEM photographs indicate the layered structure and the crystallinity of nanocrystalline Si with an average grain size of 10 nm. In this prototype device, a series of reproducible conductance peaks have been observed as a function of the applied gate bias at room temperature. The real voltage spacing of 0.38V between the peaks is determined from an equivalent circuit. The results are in agreement with the theory of Coulomb blockade effect using 1.1 aF of capacitance in single Si nanocrystallite. We conclude that the observed behavior results from resonant tunneling, which is strongly influenced by Coulomb blockade effect, through the zero-dimensional states in the well isolated silicon quantum dots.

Room temperature electron tunneling and storage in a nanocrystalline silicon floating gate structure

2004 ◽  
Vol 338-340 ◽  
pp. 318-321 ◽  
Author(s):  
Liangcai Wu ◽  
Min Dai ◽  
Xinfan Huang ◽  
Yongjun Zhang ◽  
Wei Li ◽  
...  
Keyword(s):  
Room Temperature ◽  
Electron Tunneling ◽  
Nanocrystalline Silicon ◽  
Floating Gate ◽  
Gate Structure ◽  
Temperature Electron ◽  
And Storage

Microwave Analysis of Resonant-tunneling Hot Electron Transistors at Room Temperature

1988 ◽  
Author(s):  
Toshihiko MORI ◽  
Kenichi IMAMURA ◽  
Hiroaki OHNISHI ◽  
Yoshihiko MINAMI ◽  
Shunichi MUTO ◽  
...  
Keyword(s):  
Resonant Tunneling ◽  
Room Temperature ◽  
Hot Electron ◽  
Electron Transistors

Experimental analysis of resonant-tunneling hot-electron transistors operated at room temperature

1988 ◽  
Vol 35 (12) ◽  
pp. 2453 ◽  
Author(s):  
T. Mori ◽  
K. Imamura ◽  
H. Ohnishi ◽  
Y. Minami ◽  
S. Muto ◽  
...  
Keyword(s):  
Experimental Analysis ◽  
Resonant Tunneling ◽  
Room Temperature ◽  
Hot Electron ◽  
Electron Transistors

A two-terminal nanocrystalline silicon memory device at room temperature

1998 ◽  
Vol 13 (11) ◽  
pp. 1328-1332 ◽  
Author(s):  
A H M Kamal ◽  
J Lützen ◽  
B A Sanborn ◽  
M V Sidorov ◽  
M N Kozicki ◽  
...  
Keyword(s):  
Room Temperature ◽  
Nanocrystalline Silicon ◽  
Memory Device

Room Temperature Hot Electron Transistors with InAs-Notched Resonant-Tunneling-Diode Injector

1991 ◽  
Vol 30 (Part 1, No. 5) ◽  
pp. 921-925 ◽  
Author(s):  
Alan Seabaugh ◽  
Yung-Chung Kao ◽  
John Randall ◽  
William Frensley ◽  
Ali Khatibzadeh
Keyword(s):  
Resonant Tunneling ◽  
Room Temperature ◽  
Resonant Tunneling Diode ◽  
Hot Electron ◽  
Tunneling Diode ◽  
Electron Transistors

Room Temperature Resonant-Tunneling Hot Electron Transistors with dc and Microwave Gain

1990 ◽  
Author(s):  
Aｌan SEABAUGH ◽  
Yung-Chung KAO ◽  
John RANDALL ◽  
William FRENSLEY ◽  
Ali KHATIBZADEH
Keyword(s):  
Resonant Tunneling ◽  
Room Temperature ◽  
Hot Electron ◽  
Electron Transistors

Formation of Nanocrystalline Silicon in Tin-Doped Amorphous Silicon Films

2020 ◽  
Vol 65 (3) ◽  
pp. 236
Author(s):  
R. M. Rudenko ◽  
O. O. Voitsihovska ◽  
V. V. Voitovych ◽  
M. M. Kras’ko ◽  
A. G. Kolosyuk ◽  
...  
Keyword(s):  
Amorphous Silicon ◽  
Crystalline Silicon ◽  
Solid Phase ◽  
Nanocrystalline Silicon ◽  
Recrystallization Temperature ◽  
Nanocrystalline Phase ◽  
Silicon Phase ◽  
Silicon Nanocrystallites ◽  
Lower Temperature ◽  
Two Stages

The process of crystalline silicon phase formation in tin-doped amorphous silicon (a-SiSn) films has been studied. The inclusions of metallic tin are shown to play a key role in the crystallization of researched a-SiSn specimens with Sn contents of 1–10 at% at temperatures of 300–500 ∘C. The crystallization process can conditionally be divided into two stages. At the first stage, the formation of metallic tin inclusions occurs in the bulk of as-precipitated films owing to the diffusion of tin atoms in the amorphous silicon matrix. At the second stage, the formation of the nanocrystalline phase of silicon occurs as a result of the motion of silicon atoms from the amorphous phase to the crystalline one through the formed metallic tin inclusions. The presence of the latter ensures the formation of silicon crystallites at a much lower temperature than the solid-phase recrystallization temperature (about 750 ∘C). A possibility for a relation to exist between the sizes of growing silicon nanocrystallites and metallic tin inclusions favoring the formation of nanocrystallites has been analyzed.

scholarly journals Hysteresis Behavior of the Donor–Acceptor-Type Ambipolar Semiconductor for Non-Volatile Memory Applications

Micromachines ◽  
2021 ◽  
Vol 12 (3) ◽  
pp. 301
Author(s):  
Young Jin Choi ◽  
Jihyun Kim ◽  
Min Je Kim ◽  
Hwa Sook Ryu ◽  
Han Young Woo ◽  
...  
Keyword(s):  
Organic Semiconductor ◽  
Field Effect ◽  
Field Effect Transistor ◽  
Memory Device ◽  
Non Volatile Memory ◽  
Device Applications ◽  
Donor Acceptor ◽  
Effect Transistor ◽  
Volatile Memory ◽  
Memory Applications

Donor–acceptor-type organic semiconductor molecules are of great interest for potential organic field-effect transistor applications with ambipolar characteristics and non-volatile memory applications. Here, we synthesized an organic semiconductor, PDPPT-TT, and directly utilized it in both field-effect transistor and non-volatile memory applications. As-synthesized PDPPT-TT was simply spin-coated on a substrate for the device fabrications. The PDPPT-TT based field-effect transistor showed ambipolar electrical transfer characteristics. Furthermore, a gold nanoparticle-embedded dielectric layer was used as a charge trapping layer for the non-volatile memory device applications. The non-volatile memory device showed clear memory window formation as applied gate voltage increases, and electrical stability was evaluated by performing retention and cycling tests. In summary, we demonstrate that a donor–acceptor-type organic semiconductor molecule shows great potential for ambipolar field-effect transistors and non-volatile memory device applications as an important class of materials.

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