Tunable Workfunction with TaN Metal Gate on HfO2-HfxSiyO Dielectrics

2004 ◽  
Vol 811 ◽  
Author(s):  
Christopher S. Olsen ◽  
Philip A. Kraus ◽  
Khaled Z. Ahmed ◽  
Shreyas Kher ◽  
Steven Hung ◽  
...  

AbstractMOS capacitors were fabricated from MOCVD HfO2 and HfxSiyO gate dielectrics with ALD TaN / PVD Ta metal electrodes. Dielectrics with 1.8 to 2.6 nm capacitance equivalent thickness (CET) were investigated with gate leakage (Jg) of 1×10−7 to 1×10−3 A/cm2 at Vg = Vfb−1V in accumulation. In addition to the C-V and I-V characterization of the MOSCAPs, XPS physical characterization was performed on monitor wafers to determine composition and physical thickness. From the combined results of the electrical and physical characterization, the relative dielectric constants of the Hf-Si-O films and the metal electrode work functions are determined, and simple models for the compositional dependence of the dielectric constant are formulated. Capacitors with the same dielectric composition and thickness exhibited 100 mV Vfb change when the thickness of the ALD TaN electrode layer was changed from 40-80Å. This change is attributed to a change in the work function of the aggregate TaN / Ta metal electrode. Workfunctions were found to be located near middle of the Si band gap, with workfunctions of 4.6 eV to 4.7 eV.

1999 ◽  
Vol 567 ◽  
Author(s):  
M.C. Gilmer ◽  
T-Y Luo ◽  
H.R. Huff ◽  
M.D. Jackson ◽  
S. Kim ◽  
...  

ABSTRACTA design-of-experiments methodology was implemented to assess the commercial equipment viability to fabricate the high-K dielectrics Ta2O5, TiO2 and BST (70/30 and 50/50 compositions) for use as gate dielectrics. The high-K dielectrics were annealed in 100% or 10% O2 for different times and temperatures in conjunction with a previously prepared NH3 nitrided or 14N implanted silicon surface. Five metal electrode configurations—Ta, TaN, W, WN and TiN—were concurrently examined. Three additional silicon surface configurations were explored in conjunction with a more in-depth set of time and temperature anneals for Ta2O5. Electrical characterization of capacitors fabricated with the above high-K gate dielectrics, as well as SIMS and TEM analysis, indicate that the post high-K deposition annealing temperature was the most significant variable impacting the leakage current density, although there was minimal influence on the capacitance. Further studies are required, however, to clarify the physical mechanisms underlying the electrical data presented.


2014 ◽  
Vol 778-780 ◽  
pp. 549-552 ◽  
Author(s):  
Jing Hua Xia ◽  
David M. Martin ◽  
Sethu Saveda Suvanam ◽  
Carl Mikael Zetterling ◽  
Mikael Östling

LaxHfyO nanolaminated thin film deposited using atomic layer deposition process has been studied as a high-K gate dielectric in 4H-SiC MOS capacitors. The electrical and nano-laminated film characteristics were studied with increasing post deposition annealing (PDA) in N2O ambient. The result shows that high quality LaxHfyO nano-laminated thin films with good interface and bulk qualities are fabricated using high PDA temperature.


2007 ◽  
Vol 1018 ◽  
Author(s):  
Qiliang Li ◽  
Sang-Mo Koo ◽  
Monica D. Edelstein ◽  
John S. Suehle ◽  
Curt A. Richter

AbstractIn this paper, we have reported the fabrication and characterization of nanowire electromechanical switches consisting of chemical-vapor-deposition grown silicon nanowires suspended over metal electrodes. The devices operate as transistors with the suspended part of the nanowire bent to touch metal electrode via electromechanical force by applying voltage. The reversible switching, large on/off current ratio, small subthreshold slope and low switching energy compared to current CMOSFET make the switches very attractive for logic device application. In addition, we have developed a physical model to investigate the switching characteristics and extract the material properties.


2016 ◽  
Vol 858 ◽  
pp. 681-684 ◽  
Author(s):  
Takuji Hosoi ◽  
Shuji Azumo ◽  
Kenji Yamamoto ◽  
Masatoshi Aketa ◽  
Yusaku Kashiwagi ◽  
...  

The mechanism of flatband voltage shift in SiC metal-oxide-semiconductor (MOS) capacitors with stacked gate dielectrics consisting of aluminum oxynitride (AlON) layers and SiO2 underlayers was investigated by varying the AlON and SiO2 thicknesses. The flatband voltages of the fabricated capacitors with fixed SiO2 underlayer thicknesses were almost independent of the AlON thickness, indicating the negligible charges in AlON layer. On the other hand, when varying SiO2 underlayer thickness, the flatband voltage decreased with an increase in capacitance equivalent thickness (CET), and the slope of their linear fit was comparable to that for SiC MOS capacitors without AlON layer. These observations can be well explained by assuming interface charges at AlON/SiO2 interface with an amount comparable, but a polarity opposite to, those at SiO2/SiC interface.


2006 ◽  
Vol 53 (5) ◽  
pp. 1153-1160 ◽  
Author(s):  
K. Yamamoto ◽  
W. Deweerd ◽  
M. Aoulaiche ◽  
M. Houssa ◽  
S. De Gendt ◽  
...  

2019 ◽  
Vol 39 (1) ◽  
pp. 393-400 ◽  
Author(s):  
Verônica Christiano ◽  
Christoph Adelmann ◽  
Guinther Kellermann ◽  
Patrick Verdonck ◽  
Sebastião G. Dos Santos Filho

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