Silicon Nanowire Electromechanical Switch for Logic Device Application

2007 ◽  
Vol 1018 ◽  
Author(s):  
Qiliang Li ◽  
Sang-Mo Koo ◽  
Monica D. Edelstein ◽  
John S. Suehle ◽  
Curt A. Richter

AbstractIn this paper, we have reported the fabrication and characterization of nanowire electromechanical switches consisting of chemical-vapor-deposition grown silicon nanowires suspended over metal electrodes. The devices operate as transistors with the suspended part of the nanowire bent to touch metal electrode via electromechanical force by applying voltage. The reversible switching, large on/off current ratio, small subthreshold slope and low switching energy compared to current CMOSFET make the switches very attractive for logic device application. In addition, we have developed a physical model to investigate the switching characteristics and extract the material properties.

2005 ◽  
Vol 109 (8) ◽  
pp. 3291-3297 ◽  
Author(s):  
Wei-Na Li ◽  
Yun-Shuang Ding ◽  
Jikang Yuan ◽  
Sinue Gomez ◽  
Steven L. Suib ◽  
...  

2004 ◽  
Vol 811 ◽  
Author(s):  
Christopher S. Olsen ◽  
Philip A. Kraus ◽  
Khaled Z. Ahmed ◽  
Shreyas Kher ◽  
Steven Hung ◽  
...  

AbstractMOS capacitors were fabricated from MOCVD HfO2 and HfxSiyO gate dielectrics with ALD TaN / PVD Ta metal electrodes. Dielectrics with 1.8 to 2.6 nm capacitance equivalent thickness (CET) were investigated with gate leakage (Jg) of 1×10−7 to 1×10−3 A/cm2 at Vg = Vfb−1V in accumulation. In addition to the C-V and I-V characterization of the MOSCAPs, XPS physical characterization was performed on monitor wafers to determine composition and physical thickness. From the combined results of the electrical and physical characterization, the relative dielectric constants of the Hf-Si-O films and the metal electrode work functions are determined, and simple models for the compositional dependence of the dielectric constant are formulated. Capacitors with the same dielectric composition and thickness exhibited 100 mV Vfb change when the thickness of the ALD TaN electrode layer was changed from 40-80Å. This change is attributed to a change in the work function of the aggregate TaN / Ta metal electrode. Workfunctions were found to be located near middle of the Si band gap, with workfunctions of 4.6 eV to 4.7 eV.


2005 ◽  
Vol 862 ◽  
Author(s):  
Vincent H. Liu ◽  
Husam H. Abu-Safe ◽  
Hameed A. Naseem ◽  
William D. Brown

AbstractThe formation of isolated silicon nanowires and silicon nanowire networks using aluminum thin film is investigated. The formation mechanism of the network mainly depends on the diffusion of silicon in the aluminum thin film. The silicon stops at the film grain boundaries. The continuous accumulations of silicon at these boundaries give raise to a continuous network of silicon nanowires. Characterization of the nanowires has been done using scanning electron microscopy and energy dispersive x-ray spectroscopy. These results are unique in the fact that the nanowires found are grown in a horizontal fashion instead of the more common vertical direction. Most of the nanowires have a diameter of about 60 nm and a length of over 10 μm.


2009 ◽  
Vol 1178 ◽  
Author(s):  
Thomas Hantschel ◽  
Volker Schulz ◽  
Andreas Schulze ◽  
Esteban Angeletti ◽  
Firat Guder ◽  
...  

AbstractThe characterization of doped regions inside silicon nanowire structures poses a challenge which must be overcome if these structures are to be incorporated into future electronic devices. Precise cross-sectioning of the nanowire along its longitudinal axis is required, followed by two-dimensional electrical measurements with nanometer spatial resolution. The authors have developed an approach to cross-section silicon nanowires and to characterize them by scanning spreading resistance microscopy (SSRM). This paper describes a cleaving- and polishing-based cross-sectioning method for silicon nanowires. High resolution SSRM measurements are demonstrated for epitaxially grown and etched silicon nanowires.


2006 ◽  
Vol 05 (04n05) ◽  
pp. 445-451 ◽  
Author(s):  
AJAY AGARWAL ◽  
N. BALASUBRAMANIAN ◽  
N. RANGANATHAN ◽  
R. KUMAR

We present CMOS compatible fabrication technique for silicon nanowire ( SiNW ) on bulk silicon wafers. Our method uses saw-tooth etch-profiles of fins followed by self-limiting oxidation to form vertically self-aligned horizontal SiNW down to 5 nm diameter. The concept of modifying the cross-section shape of SiNW from triangular to circular and the ability to achieve desired nanowire diameter are unique in this work. Nanowires formed by such technique can be utilized to realize several nanoelectronics devices like gate-all-around transistor, single-electron-transistor, etc.; NEMS and bio-medical sensors; all in a CMOS friendly manner. The physical and electrical characterization of the SiNW is also presented in this paper.


Nanomaterials ◽  
2021 ◽  
Vol 11 (4) ◽  
pp. 999
Author(s):  
Samuel Ahoulou ◽  
Etienne Perret ◽  
Jean-Marie Nedelec

Silicon nanowires are attractive materials from the point of view of their electrical properties or high surface-to-volume ratio, which makes them interesting for sensing applications. However, they can achieve a better performance by adjusting their surface properties with organic/inorganic compounds. This review gives an overview of the main techniques used to modify silicon nanowire surfaces as well as characterization techniques. A comparison was performed with the functionalization method developed, and some applications of modified silicon nanowires and their advantages on those non-modified are subsequently presented. In the final words, the future opportunities of functionalized silicon nanowires for chipless tag radio frequency identification (RFID) have been depicted.


2007 ◽  
Vol 18 (31) ◽  
pp. 315202 ◽  
Author(s):  
Qiliang Li ◽  
Sang-Mo Koo ◽  
Monica D Edelstein ◽  
John S Suehle ◽  
Curt A Richter

2021 ◽  
Author(s):  
Xi Chen ◽  
Kairan Luan ◽  
Wenbo Zhang ◽  
Xiuhuan Liu ◽  
Jihong Zhao ◽  
...  

Abstract Using chromium (Cr), which was deposited by radio frequency magnetron sputtering, as a buffer layer for synthesizing high-quality hexagonal boron nitride (hBN) films by low-pressure chemical vapor deposition (LPCVD) was demonstrated. The effect of growth temperature and annealing process on the quality of the Cr buffer layer was investigated. The characterization of the dependence of hBN film quality on growth temperature, substrate, and annealing process was discussed. All evidence shows that using a Cr buffer layer can significantly improve the crystalline quality of hBN. A DUVPD based on hBN film using Cr as the bottom electrode was fabricated with a small leakage current. The photocurrent is 3.5 nA at a bias of 500 V, and it exhibits good switching characteristics.


Materials ◽  
2021 ◽  
Vol 14 (21) ◽  
pp. 6275
Author(s):  
Soeun Jin ◽  
Jung-Dae Kwon ◽  
Yonghun Kim

A memristor based on emerging resistive random-access memory (RRAM) is a promising candidate for use as a next-generation neuromorphic computing device which overcomes the von Neumann bottleneck. Meanwhile, due to their unique properties, including atomically thin layers and surface smoothness, two-dimensional (2D) materials are being widely studied for implementation in the development of new information-processing electronic devices. However, inherent drawbacks concerning operational uniformities, such as device-to-device variability, device yield, and reliability, are huge challenges in the realization of concrete memristor hardware devices. In this study, we fabricated Ta2O5-based memristor devices, where a 2D-MoS2 buffer layer was directly inserted between the Ta2O5 switching layer and the Ag metal electrode to improve uniform switching characteristics in terms of switching voltage, the distribution of resistance states, endurance, and retention. A 2D-MoS2 layered buffer film with a 5 nm thickness was directly grown on the Ta2O5 switching layer by the atomic-pressure plasma-enhanced chemical vapor deposition (AP-PECVD) method, which is highly uniform and provided a superior yield of 2D-MoS2 film. It was observed that the switching operation was dramatically stabilized via the introduction of the 2D-MoS2 buffer layer compared to a pristine device without the buffer layer. It was assumed that the difference in mobility and reduction rates between Ta2O5 and MoS2 caused the narrow localization of ion migration, inducing the formation of more stable conduction filament. In addition, an excellent yield of 98% was confirmed while showing cell-to-cell operation uniformity, and the extrinsic and intrinsic variabilities in operating the device were highly uniform. Thus, the introduction of a MoS2 buffer layer could improve highly reliable memristor device switching operation.


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