MODELING OF THE PHENOMENON OF AMPLITUDE-PHASE CONVERSION AT THE OUTPUT STAGE OF RADIO TRANSMITTER

Author(s):  
A.A. Yakunina ◽  
◽  
E.V. Vasilyev ◽  
2011 ◽  
Vol E94-C (10) ◽  
pp. 1557-1564
Author(s):  
Yasuhiro NAKASHA ◽  
Naoki HARA ◽  
Kiyomichi ARAKI

Electronics ◽  
2021 ◽  
Vol 10 (12) ◽  
pp. 1381
Author(s):  
Wojciech Kołodziejski ◽  
Stanisław Kuta ◽  
Jacek Jasielski

This paper presents new architectures and implementations of original open-loop Class-BD audio amplifiers with balanced Common-Mode output. The output stage of each proposed amplifier includes the typical H-bridge with four MOSFETs and four additional MOSFET switches that balance and keep the Common-Mode output constant. The presented amplifiers employ the extended NBDD PWM or PSC PWM modulation scheme. When the output stage is built only on NMOSFET transistors, gate drivers require a floating power supply, using a self-boost charge pump with capacitive isolation of the control signal. The use of complementary MOSFETs in the output stage greatly simplifies gate control systems. The proposed amplifiers were compared to the typical Class-BD configuration, using the optimal NBDD modulation with respect to audio performance of the Differential-Mode (DM) and Common-Mode (CM) outputs. Basic SPICE simulations and experimental studies have shown that the proposed Class-BD amplifiers have similar audio performance to the prototype with the optimal NBDD modulation scheme, while at the same time having a balanced constant voltage CM output, thus eliminating the main contributor to radiation emission. As a result, the filtering of the DM output signals can be greatly simplified, while the filtering of the CM output signals can be theoretically eliminated. Practically, due to the timing errors added by the gate drivers, spikes are generated at the CM output, which are very easy to filter out by the reduced LC output filter, even at very low L.


Author(s):  
Kalina Grzelak ◽  
Rouzana Pulikkal Thumbayil ◽  
Søren Kegnæs ◽  
Maciej Trejda ◽  
Anders Riisager

2021 ◽  
Vol 11 (2) ◽  
pp. 19
Author(s):  
Francesco Centurelli ◽  
Riccardo Della Sala ◽  
Pietro Monsurrò ◽  
Giuseppe Scotti ◽  
Alessandro Trifiletti

In this paper, we present a novel operational transconductance amplifier (OTA) topology based on a dual-path body-driven input stage that exploits a body-driven current mirror-active load and targets ultra-low-power (ULP) and ultra-low-voltage (ULV) applications, such as IoT or biomedical devices. The proposed OTA exhibits only one high-impedance node, and can therefore be compensated at the output stage, thus not requiring Miller compensation. The input stage ensures rail-to-rail input common-mode range, whereas the gate-driven output stage ensures both a high open-loop gain and an enhanced slew rate. The proposed amplifier was designed in an STMicroelectronics 130 nm CMOS process with a nominal supply voltage of only 0.3 V, and it achieved very good values for both the small-signal and large-signal Figures of Merit. Extensive PVT (process, supply voltage, and temperature) and mismatch simulations are reported to prove the robustness of the proposed amplifier.


Circuit World ◽  
2019 ◽  
Vol 45 (2) ◽  
pp. 80-85
Author(s):  
Tian Lei ◽  
Nan Gong ◽  
Li Wang ◽  
Qin Qin Li ◽  
Heng Wei Wang

Purpose Because of the logic delay in the converter, the minimum turn on time of the switch is influenced by the constant time. When the inductor current gets to the threshold of the chip, the control signal will delay for a period. This makes the inductor current rising with the increasing of the clock and leads to the load current out of control. Thus, this paper aims to design an oscillator with a variable frequency protection function. Design/methodology/approach This paper presents an oscillator with the reducing frequency applied in the DC-DC converter. When the converter works normally, the operating frequency of the oscillator is 1.5 MHz. So the inductor current has enough time to decay and prevent the power transistor damaging. After the abnormal condition, the converter returns to the normal operating mode automatically. Findings Based on 0.5 µm CMOS process, simulated by the HSPICE, the simulation results shows that the frequency of the oscillator linearly decreases from 1.5 MHz to 380 KHz when the feedback voltage less than 0.2 V. The maximum deviation of the oscillator frequency is only 6 per cent from −50°C to 125°C within the power supply voltage of 2.7-5.5 V. Originality/value When the light load occurs at the output stage, the oscillator frequency will decrease as the load voltage drops. The test results shows that when the circuit works in the normal condition, the oscillator frequency is 1.5 MHz. When the load decreased, the operating frequency is dropped dramatically.


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