Simulation of radiation effects in ultra-thin insulating layers

The Monte Carlo simulations of charged particle transport are used to investigate the effects of exposing ultra-thin layers of insulators (commonly used in integrated circuits) to beams of protons, alpha particles and heavy ions. Materials considered include silicon dioxide, aluminum nitride, alumina, and polycarbonate - lexan. The parameters that have been varied in simulations include the energy of incident charged particles and insulating layer thickness. Materials are compared according to both ionizing and non-ionizing effects produced by the passage of radiation.

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Simulation of Proton Beam Effects in Thin Insulating Films

International Journal of Photoenergy ◽

10.1155/2013/128410 ◽

2013 ◽

Vol 2013 ◽

pp. 1-9 ◽

Cited By ~ 1

Author(s):

Ljubinko Timotijevic ◽

Irfan Fetahovic ◽

Djordje Lazarevic ◽

Milos Vujisic

Keyword(s):

Monte Carlo ◽

Silicon Nitride ◽

Integrated Circuits ◽

Silicon Dioxide ◽

Monte Carlo Simulations ◽

Proton Energy ◽

Transport Parameters ◽

Insulating Layer ◽

Insulating Films ◽

Ultrathin Layers

Effects of exposing several insulators, commonly used for various purposes in integrated circuits, to beams of protons have been investigated. Materials considered include silicon dioxide, silicon nitride, aluminium nitride, alumina, and polycarbonate (Lexan). The passage of proton beams through ultrathin layers of these materials has been modeled by Monte Carlo simulations of particle transport. Parameters that have been varied in simulations include proton energy and insulating layer thickness. Materials are compared according to both ionizing and nonionizing effects produced by the passage of protons.

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Calculation the Effect of Atomic Number for Projectile and Target on the Electronic Stopping Power

Journal of University of Babylon for Pure and Applied Sciences ◽

10.29196/jubpas.v27i2.2077 ◽

2019 ◽

Vol 27 (2) ◽

pp. 170-177

Author(s):

Roaa Salam Kadhum Al- Hasnawei

Keyword(s):

Theoretical Result ◽

Atomic Number ◽

Heavy Ions ◽

Theoretical Study ◽

Charged Particles ◽

Alpha Particles ◽

Stopping Power ◽

Heavy Charged Particles ◽

Electronic Stopping Power

In this research, a theoretical study was made to calculate electronic stopping power for heavy charged particles (Protons, Alpha particles, Heavy ions (C,O)) which interact with atomic targets (H,C,O,Si) by using the equation which resulting from distant and close collisions ,as it has been calculating the effect of atomic number (Z1) for projectiles and the effect of atomic number (Z2) for targets on the electronic stopping power in range velocities (v=vo,2vo,5vo,10vo). Mathematical approximative methods are used in the calculation and some of the equation programmed by Matlab language to obtain the theoretical result which is shown in the graphic.

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Monte Carlo Simulation on the CD-SEM Images of SiO2/Si Systems

Microscopy and Microanalysis ◽

10.1017/s1431927619000552 ◽

2019 ◽

Vol 25 (4) ◽

pp. 849-858

Author(s):

P. Zhang

Keyword(s):

Monte Carlo ◽

Silicon Dioxide ◽

Si Substrate ◽

Sem Images ◽

Insulating Layer ◽

Pitch Structure ◽

Experimental Parameters ◽

Material Systems ◽

Edge Profile ◽

Sem Imaging

AbstractSilicon dioxide (SiO2) has been the most important insulator in the highly-developed field of silicon (Si) technology. Accurate pitch and gate linewidth measurements for SiO2/Si systems (systems with a SiO2 insulating layer and Si substrate) have become necessary. Studying one such system obviously presents different results from that of the widely researched Si/Si structure, because the edge profile of the secondary electron (SE) signal contains contributions from two materials. In this work, several scanning electron microscope (SEM) images and SE profiles of SiO2/Si pitch and trapezoidal line structures, using various geometric and experimental parameters, were simulated through the use of Monte Carlo (MC) methods. It was found that, in contrast to Si/Si systems, the height of the insulating layer cannot be ignored during the evaluation of pitch and linewidth. The thickness (i.e., height) factor does play an important role in the contrast of SEM imaging and the shape of the SE profile in these two-material systems. The mechanism of the influence of insulating layer thickness for imaging was studied in detail. In addition, the SiO2/Si pitch structure with a real rough surface was also studied. This work has significant implications for the study of various kinds of two-material systems and could help to optimize the pitch and gate linewidth measurements.

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Suppression of Timing Variations due to Random Dopant Fluctuation by Back-Gate Bias in a Nanometer CMOS Inverter

Recent Advances in Electrical & Electronic Engineering (Formerly Recent Patents on Electrical & Electronic Engineering) ◽

10.2174/2352096513666201208102615 ◽

2020 ◽

Vol 13 ◽

Author(s):

Kai Zhang ◽

Weifeng Lü ◽

Peng Si ◽

Zhifeng Zhao ◽

Tianyu Yu

Keyword(s):

Monte Carlo ◽

Integrated Circuits ◽

Metal Oxide ◽

Metal Oxide Semiconductor ◽

Oxide Semiconductor ◽

Gate Bias ◽

Cmos Inverter ◽

Back Gate ◽

Random Dopant Fluctuation ◽

Random Dopant

Background: In state-of-the-art nanometer metal-oxide-semiconductor-field-effect- transistors (MOSFETs), optimization of timing characteristic is one of the major concerns in the design of modern digital integrated circuits. Objective: This study proposes an effective back-gate-biasing technique to comprehensively investigate the timing and its variation due to random dopant fluctuation (RDF) employing Monte Carlo methodology. Methods: To analyze RDF-induced timing variation in a 22-nm complementary metal-oxide semiconductor (CMOS) inverter, an ensemble of 1000 different samples of channel-doping for negative metal-oxide semiconductor (NMOS) and positive metal-oxide semiconductor (PMOS) was reproduced and the input/output curves were measured. Since back-gate bias is technology dependent, we present in parallel results with and without VBG. Results: It is found that the suppression of RDF-induced timing variations can be achieved by appropriately adopting back-gate voltage (VBG) through measurements and detailed Monte Carlo simulations. Consequently, the timing parameters and their variations are reduced and, moreover, that they are also insensitive to channel doping with back-gate bias. Conclusion: Circuit designers can appropriately use back-gate bias to minimize timing variations and improve the performance of CMOS integrated circuits.

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