scholarly journals Fabrication of High-k Gate Insulator Films by Atomic Layer Deposition and Their Properties Influenced by Substrate Hydrophilicity

2011 ◽  
Vol 54 (2) ◽  
pp. 105-109
Author(s):  
Yukinori MORITA ◽  
Shinji MIGITA ◽  
Wataru MIZUBAYASHI ◽  
Hiroyuki OTA
2020 ◽  
Vol 8 (38) ◽  
pp. 13342-13348
Author(s):  
Wan-Ho Choi ◽  
Woojin Jeon ◽  
Jin-Seong Park

Study of the correlation between mobility (μeff) and dielectric constant (k) in a PEALD high-k SiO2/ZrO2 gate insulator structure via nanoscale engineering.


2015 ◽  
Vol 15 (1) ◽  
pp. 382-385
Author(s):  
Jun Hee Cho ◽  
Sang-Ick Lee ◽  
Jong Hyun Kim ◽  
Sang Jun Yim ◽  
Hyung Soo Shin ◽  
...  

Nanomaterials ◽  
2019 ◽  
Vol 9 (8) ◽  
pp. 1085 ◽  
Author(s):  
Kemelbay ◽  
Tikhonov ◽  
Aloni ◽  
Kuykendall

As one of the highest mobility semiconductor materials, carbon nanotubes (CNTs) have been extensively studied for use in field effect transistors (FETs). To fabricate surround-gate FETs— which offer the best switching performance—deposition of conformal, weakly-interacting dielectric layers is necessary. This is challenging due to the chemically inert surface of CNTs and a lack of nucleation sites—especially for defect-free CNTs. As a result, a technique that enables integration of uniform high-k dielectrics, while preserving the CNT’s exceptional properties is required. In this work, we show a method that enables conformal atomic layer deposition (ALD) of high-k dielectrics on defect-free CNTs. By depositing a thin Ti metal film, followed by oxidation to TiO2 under ambient conditions, a nucleation layer is formed for subsequent ALD deposition of Al2O3. The technique is easy to implement and is VLSI-compatible. We show that the ALD coatings are uniform, continuous and conformal, and Raman spectroscopy reveals that the technique does not induce defects in the CNT. The resulting bilayer TiO2/Al2O3 thin-film shows an improved dielectric constant of 21.7 and an equivalent oxide thickness of 2.7 nm. The electrical properties of back-gated and top-gated devices fabricated using this method are presented.


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