Characterization and Isolation Techniques in Silicon on Insulator Technology Microprocessor Designs

2000 ◽  
Author(s):  
T. Kane ◽  
M. Cambra ◽  
M. Tenney ◽  
P. McGinnis ◽  
A. Domenicucci ◽  
...  
Keyword(s):  
Focused Ion Beam ◽  
Failure Modes ◽  
Ion Beam ◽  
Silicon On Insulator ◽  
Scanning Capacitance Microscopy ◽  
Isolation Techniques ◽  
Silicon On Insulator Technology ◽  
Soi Technology

Abstract This paper discusses the challenges involved in testing microprocessors incorporating silicon-on-insulator (SOI) technology and assesses new characterizations tools, such as scanning capacitance microscopy (SCM), focused ion beam (FIB) analysis, and AFM electrical probing, that show promise when used to examine SOI device anomalies and failure modes.

Application of FIB Circuit Edit in Analysis of Memory Failure of SOI Devices

2006 ◽  
Author(s):  
Z. G. Song ◽  
S. K. Loh ◽  
X. H. Zheng ◽  
S.P. Neo ◽  
C. K. Oh
Keyword(s):  
Focused Ion Beam ◽  
Ion Beam ◽  
Electrical Characterization ◽  
Silicon On Insulator ◽  
First Case ◽  
Edx Analyses ◽  
Memory Failure ◽  
Soi Devices ◽  
Voltage Contrast ◽  
Soi Technology

Abstract This article presents two cases to demonstrate the application of focused ion beam (FIB) circuit edit in analysis of memory failure of silicon on insulator (SOI) devices using XTEM and EDX analyses. The first case was a single bit failure of SRAM units manufactured with 90 nm technology in SOI wafer. The second case was the whole column failure with a single bit pass for a SRAM unit. From the results, it was concluded that FIB circuit edit and electrical characterization is a good methodology for further narrowing down the defective location of memory failure, especially for SOI technology, where contact-level passive voltage contrast is not suitable.

Electrical Characterization of Different Failure Modes in Sub-100 nm Devices Using Nanoprobing Technique

2009 ◽  
Author(s):  
E. Hendarto ◽  
S.L. Toh ◽  
J. Sudijono ◽  
P.K. Tan ◽  
H. Tan ◽  
...  
Keyword(s):  
Electron Microscope ◽  
Focused Ion Beam ◽  
Failure Modes ◽  
Ion Beam ◽  
Electrical Characterization ◽  
Nickel Silicide ◽  
Fault Isolation ◽  
Technology Nodes ◽  
Scanning Electron

Abstract The scanning electron microscope (SEM) based nanoprobing technique has established itself as an indispensable failure analysis (FA) technique as technology nodes continue to shrink according to Moore's Law. Although it has its share of disadvantages, SEM-based nanoprobing is often preferred because of its advantages over other FA techniques such as focused ion beam in fault isolation. This paper presents the effectiveness of the nanoprobing technique in isolating nanoscale defects in three different cases in sub-100 nm devices: soft-fail defect caused by asymmetrical nickel silicide (NiSi) formation, hard-fail defect caused by abnormal NiSi formation leading to contact-poly short, and isolation of resistive contact in a large electrical test structure. Results suggest that the SEM based nanoprobing technique is particularly useful in identifying causes of soft-fails and plays a very important role in investigating the cause of hard-fails and improving device yield.

Solving the Voltage Contrast on Floating Substrate with Standard FA Toolset

2016 ◽  
Author(s):  
Julien Goxe ◽  
Béatrice Vanhuffel ◽  
Marie Castignolles ◽  
Thomas Zirilli
Keyword(s):  
Electron Microscope ◽  
Scanning Electron Microscope ◽  
Sample Preparation ◽  
Failure Analysis ◽  
Focused Ion Beam ◽  
Ion Beam ◽  
Silicon On Insulator ◽  
Mixed Signal ◽  
Voltage Contrast ◽  
Scanning Electron

Abstract Passive Voltage Contrast (PVC) in a Scanning Electron Microscope (SEM) or a Focused Ion Beam (FIB) is a key Failure Analysis (FA) technique to highlight a leaky gate. The introduction of Silicon On Insulator (SOI) substrate in our recent automotive analog mixed-signal technology highlighted a new challenge: the Bottom Oxide (BOX) layer, by isolating the Silicon Active Area from the bulk made PVC technique less effective in finding leaky MOSFET gates. A solution involving sample preparation performed with standard FA toolset is proposed to enhance PVC on SOI substrate.

Failure Modes, Reliability Analysis and Case Studies on the Integration of Copper and Low-K Technology

2004 ◽  
Author(s):  
Huixian Wu ◽  
James Cargo ◽  
Huixian Wu ◽  
Marvin White
Keyword(s):  
Failure Analysis ◽  
Case Studies ◽  
Cross Section ◽  
Focused Ion Beam ◽  
Failure Modes ◽  
Ion Beam ◽  
Copper Interconnects ◽  
Wet Chemical ◽  
Low K ◽  
Section Analysis

Abstract The integration of copper interconnects and low-K dielectrics will present novel failure modes and reliability issues to failure analysts. This paper discusses failure modes related to Cu/low-K technology. Here, physical failure analysis (FA) techniques including deprocessing and cross-section analysis have been developed. The deprocessing techniques include wet chemical etching, reactive ion etching, chemical mechanical polishing and a combination of these techniques. Case studies on different failure modes related to Cu/low k technology are discussed: copper voiding, copper extrusion; electromigration stress failure; dielectric cracks; delamination-interface adhesion; and FA on circuit-under-pad. For the cross-section analysis of copper/low-K samples, focused ion beam techniques have been developed. Scanning electron microscopy, EDX, and TEM analytical analysis have been used for failure analysis for Cu/low-K technology. Various failure modes and reliability issues have also been addressed.

Failure Analysis Strategies for Multistacked Memory Devices with TSV Interconnects

2015 ◽  
Author(s):  
Frank Altmann ◽  
Christian Grosse ◽  
Falk Naumann ◽  
Jens Beyersdorfer ◽  
Tony Veches
Keyword(s):  
Failure Analysis ◽  
Focused Ion Beam ◽  
Failure Modes ◽  
Ion Beam ◽  
Memory Devices ◽  
Metallographic Cross Section ◽  
Electron Beam Induced Current ◽  
Thermal Simulations ◽  
Lock In ◽  
Non Destructive

Abstract In this paper we will demonstrate new approaches for failure analysis of memory devices with multiple stacked dies and TSV interconnects. Therefore, TSV specific failure modes are studied on daisy chain test samples. Two analysis flows for defect localization implementing Electron Beam Induced Current (EBAC) imaging and Lock-in-Thermography (LIT) as well as adapted Focused Ion Beam (FIB) preparation and defect characterization by electron microscopy will be discussed. The most challenging failure mode is an electrical short at the TSV sidewall isolation with sub-micrometer dimensions. It is shown that the leakage path to a certain TSV within the stack can firstly be located by applying LIT to a metallographic cross section and secondly pinpointing by FIB/SEM cross-sectioning. In order to evaluate the potential of non-destructive determination of the lateral defect position, as well as the defect depth from only one LIT measurement, 2D thermal simulations of TSV stacks with artificial leakages are performed calculating the phase shift values per die level.

scholarly journals Higher order mode conversion via focused ion beam milled Bragg gratings in Silicon-on-Insulator waveguides

2004 ◽  
Vol 12 (21) ◽  
pp. 5274 ◽  
Author(s):  
V. G. Ta'eed ◽  
D. J. Moss ◽  
B. J. Eggleton ◽  
D. Freeman ◽  
S. Madden ◽  
...  
Keyword(s):  
Focused Ion Beam ◽  
Mode Conversion ◽  
Ion Beam ◽  
Bragg Gratings ◽  
Higher Order ◽  
Silicon On Insulator ◽  
Order Mode ◽  
Higher Order Mode

scholarly journals Polymer micro-lenses as an long-coupling-distance interfacing layer in low-cost optical coupling solution between optical fibers and photonic integrated waveguide circuits

2019 ◽  
Vol 11 (4) ◽  
pp. 121
Author(s):  
Andrzej Kaźmierczak ◽  
Mateusz Słowikowski ◽  
Krystian Pavłov ◽  
Maciej Filipiak ◽  
Ryszard Piramidowicz
Keyword(s):  
Optical Fiber ◽  
Focused Ion Beam ◽  
Low Cost ◽  
Ion Beam ◽  
Single Mode ◽  
Optical Fiber Communication ◽  
Japanese Journal ◽  
Spot Size ◽  
Optical Signal ◽  
Silicon On Insulator

We present a low-cost scheme for non-permanent optical signal coupling for prospective application in single use photonic integrated chips. The proposed scheme exploits the use of polymer kinoform microlenses. The feasibility of the proposed solution is demonstrated by the experimental investigation of the optical signal coupling from single mode optical fiber (SMF) to the test structure of SixNy integrated waveguide. Full Text: PDF ReferencesM. Smit et al., "An introduction to InP-based generic integration technology," Semiconductor Science and Technology, 29 (8), 083001, 2014 CrossRef R. Baets et al., "Silicon Photonics: silicon nitride versus silicon-on-insulator," in Optical Fiber Communication Conference, OSA Technical Digest (online) (Optical Society of America, 2016), paper Th3J.1. CrossRef K. Shiraishi et al., "A silicon-based spot-size converter between single-mode fibers and Si-wire waveguides using cascaded tapers," Appl. Phys. Lett. 91, 141120 (2007) CrossRef Y. Sobu et al., "GaInAsP/InP waveguide dual core spot size converter for optical fiber,"IEEE Photonic Society 24th Annual Meeting, 469-470, (2011). CrossRef F. Van Laere et al., "Compact and Highly Efficient Grating Couplers Between Optical Fiber and Nanophotonic Waveguides," Journal of Lightwave Technology, vol. 25, no. 1, pp. 151-156, Jan. 2007. CrossRef A. Kaźmierczak et al., "Light coupling and distribution or Si3N4/SiO2 integrated multichannel single mode sensing system," Opt. Eng. 48, 2009, pp. 014401 CrossRef M. Rossi et al., "Arrays of anamorphic phase-matched Fresnel elements for diode-to-fiber coupling," Appl. Opt. 34, 2483-2488 (1995) CrossRef M. Prasciolu et al, "Fabrication of Diffractive Optical Elements On-Fiber for Photonic Applications by Nanolitography," Japanese Journal of Applied Physics, Volume 42, (2003) CrossRef F.Schiappelli et al., "Efficient fiber-to-waveguide coupling by a lens on the end of the optical fiber fabricated by focused ion beam milling" Microelectronic Engineering Volumes 73-74, pp.397-404 (2004) CrossRef

scholarly journals Focused-Ion-Beam Fabrication of Slanted Grating Couplers in Silicon-on-Insulator Waveguides

2007 ◽  
Vol 19 (11) ◽  
pp. 816-818 ◽  
Author(s):  
Jonathan Schrauwen ◽  
Frederik Van Laere ◽  
Dries Van Thourhout ◽  
Roel Baets
Keyword(s):  
Focused Ion Beam ◽  
Ion Beam ◽  
Silicon On Insulator ◽  
Grating Couplers

Improved Soi Films By High Dose Oxygen Implantation and Lamp Annealing

1985 ◽  
Vol 53 ◽  
Author(s):  
G. K. Celler ◽  
P. L. F. Hemment ◽  
K. W. West ◽  
J. M. Gibson
Keyword(s):  
High Speed ◽  
Ion Beam ◽  
Silicon On Insulator ◽  
High Dose ◽  
Cmos Circuits ◽  
Radiation Hardened ◽  
Silicon On Insulator Technology ◽  
Annealing Procedure ◽  
Oxygen Precipitates ◽  
Sharp Interfaces

ABSTRACTIon beam synthesis of a buried SiO2 layer is an attractive silicon-on-insulator technology for high speed CMOS circuits and radiation hardened devices. We demonstrate here a new annealing procedure at 1405°C that produces silicon films of excellent quality, essentially free of oxygen precipitates and with sharp interfaces between the Si and the SiO2.

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