Via Chain Failure Analysis Using a Combination of E-Beam and Optical Beam Techniques

2003 ◽  
Author(s):  
Srikanth Perungulam ◽  
Albert Gleason
Keyword(s):  
Electron Microscope ◽  
Laser Scanning ◽  
Optical Beam ◽  
Induced Voltage ◽  
Scanning Microscope ◽  
Thermally Induced ◽  
Substrate Current ◽  
Voltage Contrast ◽  
Beam Technique ◽  
Scanning Electron

Abstract This paper outlines some of the optical and e-beam based techniques that can be used to isolate via chain failures. The Scanning electron microscope based techniques discussed are Passive Voltage Contrast (PVC) and Substrate Current Imaging (SCI). The optical beam technique discussed is Thermally Induced Voltage Alteration (TIVA) on the Laser Scanning Microscope. A combination of these techniques can be used to effectively analyze all types of via chain failures.

Solving the Voltage Contrast on Floating Substrate with Standard FA Toolset

2016 ◽  
Author(s):  
Julien Goxe ◽  
Béatrice Vanhuffel ◽  
Marie Castignolles ◽  
Thomas Zirilli
Keyword(s):  
Electron Microscope ◽  
Scanning Electron Microscope ◽  
Sample Preparation ◽  
Failure Analysis ◽  
Focused Ion Beam ◽  
Ion Beam ◽  
Silicon On Insulator ◽  
Mixed Signal ◽  
Voltage Contrast ◽  
Scanning Electron

Abstract Passive Voltage Contrast (PVC) in a Scanning Electron Microscope (SEM) or a Focused Ion Beam (FIB) is a key Failure Analysis (FA) technique to highlight a leaky gate. The introduction of Silicon On Insulator (SOI) substrate in our recent automotive analog mixed-signal technology highlighted a new challenge: the Bottom Oxide (BOX) layer, by isolating the Silicon Active Area from the bulk made PVC technique less effective in finding leaky MOSFET gates. A solution involving sample preparation performed with standard FA toolset is proposed to enhance PVC on SOI substrate.

Circuit Tracing on Integrated Circuit Using FIB Passive Voltage Contrast Effect

2015 ◽  
Author(s):  
Alexander Sorkin ◽  
Chris Pawlowicz ◽  
Alex Krechmer ◽  
Michael W. Phaneuf
Keyword(s):  
Electron Microscope ◽  
Integrated Circuits ◽  
Integrated Circuit ◽  
Metal Layer ◽  
Database System ◽  
Conventional Procedure ◽  
Sem Imaging ◽  
Voltage Contrast ◽  
Scanning Electron ◽  
Graphic Database

Abstract Competitive circuit analysis of Integrated Circuits (ICs) is one of the most challenging types of analysis. It involves multiple complex IC die de-processing/de-layering steps while keeping precise planarity from metal layer to metal layer. Each step is followed by Scanning Electron Microscope (SEM) imaging together with mosaicking that subsequently passes through an image recognition and Graphic Database System (GDS) conversion process. This conventional procedure is quite time and resource consuming. The current paper discusses and demonstrates a new inventive methodology of circuit tracing on an IC using known FIB Passive Voltage Contrast (PVC) effects [1]. This technique provides significant savings in time and resources.

Local Investigation of Microstructure-Induced Fatigue Damaging

2009 ◽  
Vol 417-418 ◽  
pp. 521-524
Author(s):  
Michael Marx ◽  
Wolfgang Schäf ◽  
Markus T. Welsch ◽  
Horst Vehoff
Keyword(s):  
Electron Microscope ◽  
Crack Initiation ◽  
Scanning Electron Microscope ◽  
Crack Propagation ◽  
Focused Ion Beam ◽  
Fatigue Cracks ◽  
Ion Beam ◽  
Short Crack ◽  
Beam Technique ◽  
Scanning Electron

From the emission of dislocations till short crack propagation fatigue is a local process determined by the microstructure. In this paper we present experiments based on refined applications of the scanning electron microscope and focused ion beam technique, which give detailed information about crack initiation and the interaction of short fatigue cracks with microstructural elements.

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