PCB Pad Cratering – Characterization Techniques and Challenges

Author(s):  
Satish Parupalli ◽  
Keith Newman ◽  
Mudasir Ahmad

Abstract Some standard characterization techniques (solder ball pull, solder ball shear, etc.) exist for the assessment of solder ball mechanical fracture strength; however, it is not clear if these test methods would also provide characterization of printed circuit board (PCB) pad cratering susceptibility. This paper provides an overview of test methods being investigated by a PCB pad crater industry working group. The scope of this industry working group is two-fold: standardization of PCB pad crater crack characterization and measurement methods and development of a quantitative quality metric for PCB pad cratering. Though the test methods were successful in creating pad craters; there was not enough distinction between the various laminate material types based on the output parameters. Based on the readings from Phase 1 study and available literature, the team is in the process of completing the Phase 2 study which will be reported at a later stage.

Author(s):  
Todd Embree ◽  
Deassy Novita ◽  
Gary Long ◽  
Satish Parupalli

The continual drive toward smaller second level interconnect dimensions, along with the introduction of Halogen-Free circuit board materials and increased process temperatures of Lead-Free solders, have all contributed to a more frequent occurrence of Pad Crater damage in circuit board materials during manufacturing and test processes. This paper addresses the methodology and test data of some common industry methods used to evaluate Pad Crater strength in circuit board materials. Pad Crater test data is highly sensitive to sample design; as a result a discussion of sample design criteria is also included.


Electronics ◽  
2021 ◽  
Vol 10 (12) ◽  
pp. 1445
Author(s):  
Muhammad Waqar ◽  
Geunyong Bak ◽  
Junhyeong Kwon ◽  
Sanghyeon Baeg

This paper measures bit error rate degradation in DDR4 due to crack in fine pitch ball grid array (FBGA) package solder ball. Thermal coefficient mismatch between the package and printed circuit board material causes cracks to occur in solder balls. These cracks change the electrical model of the solder ball and introduce parallel capacitance in the electrical model. The capacitance causes higher frequency attenuation and closes the data eye. As the data rate of the DDR4 increases there are more data eye closures. The data eye closure causes bit error rate (BER) degradation as the timing margin and voltage margin decreases. This degradation reduces the reliability of the system and causes more intermittent errors. DDR4 data line is loaded with a parallel capacitive element to mimic a crack in solder ball. The measured data eye shows a decrease in eye width. Bathtub plots are created for comparison of cracked solder ball and intact solder ball. The bathtub plots show the BER degradation due to crack in solder ball.


Electronics ◽  
2020 ◽  
Vol 9 (6) ◽  
pp. 1020
Author(s):  
Davide Piumatti ◽  
Stefano Borlo ◽  
Matteo Quitadamo ◽  
Matteo Sonza Reorda ◽  
Eric Giacomo Armando ◽  
...  

Power electronics technology is widely used in several areas, such as in the railways, automotive, electric vehicles, and renewable energy sectors. Some of these applications are safety critical, e.g., in the automotive domain. The heat produced by power devices must be efficiently dissipated to allow them to work within their operational thermal limits. Moreover, numerous ageing effects are due to thermal stress, which causes mechanical issues. Therefore, the reliability of a circuit depends on its dissipation system, even if it consists of a simple passive heatsink mounted on the power device. During the Printed Circuit Board (PCB) production, an incorrect assembly of the heatsink can cause a worse heat dissipation with a significant increase of the junction temperatures (Tj). In this paper, three possible test strategies are compared for testing the correct assembling of heatsinks. The considered strategies are used at the PCB end-manufacturing. The effectiveness of the different test methods considered is assessed on a case study corresponding to a Power Supply Unit (PSU).


Author(s):  
Jefferson Talledo

Semiconductor packages using solder balls as interconnect to the printed circuit board (PCB) are very popular especially in mobile products like smart phones. Recent requirement to make the package much thinner is very challenging. The solder ball collapse height after the solder ball is reflowed on the package substrate metal pad would need to be tightly controlled and aligned with the required height to meet the target overall package thickness. Another challenge is that the package has to be developed in a short period of time. In this study, theoretical and solid modeling techniques were developed to estimate the solder ball collapse height and compared with actual evaluation results. With these, the solder ball collapse height could be quickly estimated to make the package design and development faster avoiding several trial evaluations on different combinations of solder ball size, substrate pad solder mask opening diameter and solder mask thickness. Based on the estimation results, using these techniques showed good agreement with actual solder ball height measurements and have now been successfully used in coming up with final package designs in a fast and cost-effective way.


2020 ◽  
Vol 142 (2) ◽  
Author(s):  
Qiming Zhang ◽  
S. W. Ricky Lee

Abstract Repeated loading is an important reason to cause pad cratering fatigue failure in ball grid array (BGA) device in printed circuit board (PCB) assembly. For industry application, the board level drop test is commonly applied to evaluate the pad cratering fatigue strength under the repetitive drop loading. Although this testing method is consistent with the actual service condition of BGA-PCB assembly, it is extremely time consuming in the testing operation and expensive in costs. Another fatigue evaluation testing method for BGA-PCB assembly is the board level cyclic bending test. Compare with the board level drop test, this testing method can be handled by universal testing machine automatically without manual operation during the testing process. In consequence, the cyclic bending test has the merits of simple, fast, and low costs, and it is always desirable to evaluate the repeated drop life of pad cratering with cyclic bending test. This research proposes a correlation between the cyclic bending and repetitive drop test in BGA-PCB assemblies. With assistance of finite element method, the equivalent cyclic bending testing conditions of drop tests are developed. The experimental validation is also conducted to prove accuracy of the correlation. From the analysis of finite element method and experiments, both cyclic bending tests and repetitive drop tests agree with the same strain–number of cycle (S–N) curve. This means the S–N curve can be treated as a generalized failure criterion of fatigue induced pad cratering. The conclusion is crucial for reliability design phases to prevent the pad cratering fatigue failure.


Sign in / Sign up

Export Citation Format

Share Document