Avaliação do desempenho do transistor MOS sem junções configurado como Nanofio ou FINFET

This work studies how the different gate configurations of junctionless transistors affects their electrical characteristics. Measurements were made on experimental junctionless transistors varying the fin width as well asthree-dimensional numerical simulations, which were calibrated with the experimental results, using the models that best apply to the physics of the junctionless devices. With the three-dimensional simulations adjusted for the fin width, a study was made based on the fin height and its electrical characteristics. These transistors can be configured either as FinFETs or as nanowires depending on the height of the silicon fin. It was obtained that junctionless FinFETs (fin height larger than the fin width), have their best electrical characteristics for long channel devices with narrow fin width and fin height with values greater than 30 nm. For junctionless nanowire transistors (similar fin height and fin width), the best potential can be seen with the decrease in the length of the channel, with narrow width and short height of the silicon fin (around 10 nm). The mobility of the experimental devices analyzed by the Split-CV method, obtaining the effective mobility of the transistors. It was obtained that for a decrease in the fin width it increases the mobility, due to the reduction of Ionized Impurity scattering. Measurements were also made due to the high temperature in triple gate junctionless nanowire transistors to almost planar devices in the range of 300 K to 500 K. It was analyzed by the effective mobility, the effects of the types of carrier scattering depending on the fin width experimentally and via simulations. It has been seen that quasi-planar transistors suffer less from the scattering effect by phonons compared to nanowires, the latter having a greater influence of surface roughness. Comparing the temperature exponents, junctionless transistors suffer more from the effect of scattering by phonons than with Coulomb effect in transistors with narrow fin width. Thus, narrow fin width devices have a greater variation of mobility with temperature compared to quasi-planar devices