scholarly journals Optimal IP Current Controller Design Based on Small Signal Stability for THD Reduction of a High-Power-Density PFC Boost Converter

2021 ◽  
Vol 11 (2) ◽  
pp. 539
Author(s):  
Ahmed H. Okilly ◽  
Hojin Jeong ◽  
Jeihoon Baek

This paper presents an optimal design for the inner current-control loop of the continuous current conduction mode (CCM) power factor correction (PFC) stage, which can be used as the front stage of the two-stage AC/DC telecom power supply. The conventional single-phase CCM-PFC boost converter is implemented with proportional–integral (PI) controllers in both the voltage and current-control loops to regulate the output DC voltage to the specified value and to ensure the input current follows the input voltage, which offers a converter with a high-power factor (PF) and low current total harmonic distortion (THD). However, due to the slow dynamic response of the PI controller at the zero-crossing point of the input supply current, the input current cannot fully follow the input voltage, which leads to high THD. In this paper, we investigate a digitally controlled PFC converter with an optimally designed inner current-control loop using a doubly-fed control loops integral-proportional (IP) controller to reduce the THD and to offer an input current with a unity PF. For the economic design of a digitally controlled PFC converter, two isolated AC and DC voltage sensors are designed for interfacing with the microcontroller unit (MCU). PSIM software as well as experimental prototype was used to test the converter performance using the proposed designed current controllers and isolated voltage sensors. We achieved a high-power-density, digitally controlled, telecom PFC stage with a power factor more than 99% and THD of about 5.50%.

Author(s):  
Ahmed H. Okilly ◽  
Jeihoon Baek

This paper presents an optimal design for the inner current control loop of the continuous current conduction mode (CCM) power factor correction (PFC) stage, which it can be used as the front stage of the two stages alternating current-direct current (AC-DC) telecom power supply. Conventional single-phase CCM-PFC boost converter usually implemented with using of the proportional-integral (PI) controllers in both of the voltage and current control loops, to regulate the output DC voltage to the specified value, moreover to maintains the input current follows the input voltage which offers converter with high power factor (P.F) and low current total harmonic distortion (THD). However, due to the slow dynamic response of the PI controller at the zero-crossing point of the input supply current, input current can’t fully follow the input voltage which leads to high THD. Digitally controlled PFC converter with an optimal design of the inner current control loop using doubly control loops IP controller to reduce the THD and to offer input current with unity P.F was performed in this paper. Furthermore, for the economic design of the digitally control PFC converter, two isolated AC and DC voltage sensors are proposed and designed for the interfacing with the microcontroller unit (MCU). PSIM software was used to test the converter performance with using the proposed designed current controllers and isolated voltage sensors. High power density digitally controlled telecom PFC stage with P.F of about 99.93%, full load efficiency of about 98.70% and THD less 5.50% is achieved in this work.


Energies ◽  
2020 ◽  
Vol 13 (5) ◽  
pp. 1114
Author(s):  
Sung-Hun Kim ◽  
Bum-Jun Kim ◽  
Jung-Min Park ◽  
Chung-Yuen Won

Input-Series-Output-Parallel (ISOP) converters, a kind of modular converter, are used in high-input voltage and high-output current applications. In ISOP converters, Input Voltage Sharing (IVS) and Output Current Sharing (OCS) should be implemented for stable operation. In order to solve this problem, this paper proposes a decentralized control method. In the proposed control, output current reference is changed according to the decentralized control characteristic in individual current control loops. In this way, the proposed control method is able to implement IVS and OCS without communication. Also, this method can be easily used in current control loops and has high reliability compared to conventional control methods that require communication. In this paper, the operation principle is described to elucidate the proposed control and a small signal model of an ISOP converter is also implemented. Based on the small signal model, IVS stability analysis is performed using pole-zero maps with varying coefficients and control gains. In addition, the current control loop is designed in a stable region. In order to demonstrate the proposed control method, a prototype ISOP converter is configured using full-bridge converters. The performance of IVS and OCS in an ISOP converter is verified by experimental result.


Author(s):  
Kema Vivek

Conventional Active Clamp-Forward topology is studied for a satellite converter owing to its comparitively simple structure, minimum number of components and fine clamping capability concerning its switch voltage stress. However, it has a high switch voltage stress,a high di/dt level and has pulsating input current shape. These are disadvantageous with respect to the EMI filter size and high input voltage converter applications.To get the better of these drawbacks, a new ACF topology with a continuous input current waveform is proposed . By this proposed waveform ,the voltage stresses on the main switches are relieved. This is crucial reliability of satelite FET switches, by utilizing a two series connected structure. These conditions will allow the proposed converter to serve as a high input voltage, high power density satellite converter.


2021 ◽  
Vol 11 (17) ◽  
pp. 7911
Author(s):  
Ahmed H. Okilly ◽  
Jeihoon Baek

The spread of the 5G technology in the telecom power applications increased the need to supply high power density with higher efficiency and higher power factor. Thus, in this paper, the performance of the different power factor correction ( PFC ) topologies implemented to work with high power density telecom power applications are investigated. Two topologies, namely the conventional and the bridge interleaved continues-current-conduction mode (CCM) PFC boost converters are designed. Selection methodology of the switching elements, the manufacturing of the boost inductors, and the optimal design for the voltage and current control circuits based on the proposed small signal stability modeling are presented. The printed circuit board (PCB) for the two different PFC topologies with a power rating of 2 kW were designed. PSIM simulation and the experiments are used to show the supply current total harmonic distortions (THD), voltage ripples, power efficiency, and the power factor for the different topologies with different loading conditions.


2010 ◽  
Vol 25 (2) ◽  
pp. 310-321 ◽  
Author(s):  
P.F. de Melo ◽  
R. Gules ◽  
E.F.R. Romaneli ◽  
R.C. Annunziato

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