scholarly journals Adoption of the Wet Surface Treatment Technique for the Improvement of Device Performance of Enhancement-Mode AlGaN/GaN MOSHEMTs for Millimeter-Wave Applications

Materials ◽  
2021 ◽  
Vol 14 (21) ◽  
pp. 6558
Author(s):  
Chun Wang ◽  
Yu-Chiao Chen ◽  
Heng-Tung Hsu ◽  
Yi-Fan Tsao ◽  
Yueh-Chin Lin ◽  
...  
Keyword(s):  
Surface Treatment ◽  
Millimeter Wave ◽  
Oxide Semiconductor ◽  
Superior Performance ◽  
Device Performance ◽  
Treatment Technique ◽  
High Electron ◽  
Al2o3 Layer ◽  
Power Added Efficiency ◽  
Enhancement Mode

In this work, a low-power plasma oxidation surface treatment followed by Al2O3 gate dielectric deposition technique is adopted to improve device performance of the enhancement-mode (E-mode) AlGaN/GaN metal-oxide-semiconductor high-electron-mobility transistors (MOSHEMTs) intended for applications at millimeter-wave frequencies. The fabricated device exhibited a threshold voltage (Vth) of 0.13 V and a maximum transconductance (gm) of 484 (mS/mm). At 38 GHz, an output power density of 3.22 W/mm with a power-added efficiency (PAE) of 34.83% were achieved. Such superior performance was mainly attributed to the high-quality Al2O3 layer with a smooth surface which also suppressed the current collapse phenomenon.

Study of Effective Graded Oxide Capacitance and Length Variation on Analog, RF and Power Performances of Dual Gate Underlap MOS-HEMT

2021 ◽  
Author(s):  
Sneha Ghosh ◽  
Anindita Mondal ◽  
Mousiki Kar ◽  
Atanu Kundu
Keyword(s):  
Dielectric Material ◽  
Drain Current ◽  
High Electron Mobility Transistor ◽  
Oxide Semiconductor ◽  
Superior Performance ◽  
Length Variation ◽  
High Electron ◽  
Power Performance ◽  
Output Resistance ◽  
Transistor Mos

Abstract Comparative analysis of a Symmetric Heterojunction Underlap Double Gate (U-DG) GaN/AlGaN Metal Oxide Semiconductor High Electron Mobility Transistor (MOS-HEMT) on varying the effective capacitance by using different oxide materials on source and drain sides, and determination of optimum length of oxides for the superior device performance has been presented in this work. This paper shows a detailed performance analysis of the Analog Figure of Merits (FoMs) like variation of Drain Current (IDS), Transconductance (gm), Output Resistance (R0), Intrinsic Gain (gmR0), RF FoMs like cut-off frequency (fT), maximum frequency of oscillation (fMAX), gate to source resistance (RGS), gate to drain resistance (RGD), gate to drain capacitance(CGD), gate to source capacitance (CGS) and total gate capacitance (CGG) using Non-Quasi-Static (NQS) approach. Power analysis includes Output power (Pout), Gain in dBm and power output efficiency (POE) have been studied. Studies reveal that the device with higher dielectric material towards source side shows superior performance. On subsequently changing the proportion of two oxides in a layer by varying length, it is observed that as the proportion of oxide increases the device demonstrates more desirable Analog and RF characteristics while best power performance is obtained from device with equal lengths of HfO2 and SiO2.

Prospect for III-Nitride Heterojunction MOSFET Structures and Devices

2004 ◽  
Vol 829 ◽  
Author(s):  
M. A. L. Johnson ◽  
D. W. Barlage ◽  
Dave Braddock
Keyword(s):  
Power Distribution ◽  
Field Effect Transistors ◽  
Oxide Semiconductor ◽  
Electron Velocity ◽  
Semiconductor Surface ◽  
Bandgap Energy ◽  
High Electron ◽  
Nitride Semiconductors ◽  
Field Plate ◽  
Enhancement Mode

ABSTRACTHeterojunction field effect transistors (HFET) for high-frequency and high-power electronics have been an area of active research in recent years as a key enabling technology for applications ranging from wireless communications to power distribution. III-Nitride semiconductors are a leading candidate for fulfilling the material requirements of these devices based on the combination of large bandgap energy, high thermal conductivity, high electron mobility and saturated electron velocity. While III-Nitride HFETs have demonstrated remarkable advances, serious materials related limitations still exist, primarily related to charge states and trapping effects at the semiconductor surface. Several groups have investigated solutions such as the deposition of dielectric passivation layers and asymmetric field-plate gate geometries for controlling the influence of trap states near the metal/semiconductor FET interface. We have demonstrated a metal-oxide semiconductor FET (MOSFET) with a substantially unpinned interface which is capable of establishing substantial charge accumulation under the gate. These III-Nitride MOSFETs may be designed to operate in either depletion mode or enhancement mode. GaN/InGaN heterojunction MOSFETs exhibit enhancement mode peak transconductance at gate voltages Vg>+5V, corresponding to energy greater than the bandgap of the underlying semiconductor which provides strong evidence of an unpinned MOS interface. Additionally III-Nitride MOSFETs eliminate the need for field plate gate structures as the electric field geometry in the gate-drain region changes limiting the tunneling of charge to unfilled surface states. In depletion mode, low-rf dispersion InGaN/GaN MOSFETs exhibit excellent microwave with ft = 8GHz for optically defined gates dimensions.We review the history of compound semiconductor MOSFET development and overlaying these developments with recent advances in the III-Nitride materials and device research. Differences in chemistry of III-Nitrides relative to all other compound semiconductors and the epitaxial deposition of gate-oxides such as Gadolinium Gallium Oxide (GGO), opens the possibility for dramatically improved devices at microwave and mm-wave frequencies as well as power MOSFET rectifiers. Initial III-Nitride MOSFETs results are presented as well as a quaternary thermodynamic framework for the stability of gate-oxide on nitride semiconductors. We also identify key materials related research challenges expected to impact the ongoing development of III-Nitride MOSFETs.

Novel high performance AlGaN/GaN based enhancement-mode metal-oxide semiconductor high electron mobility transistor

2014 ◽  
Vol 11 (3-4) ◽  
pp. 844-847 ◽  
Author(s):  
Raphael Brown ◽  
Abdullah Al-Khalidi ◽  
Douglas Macfarlane ◽  
Sanna Taking ◽  
Gary Ternent ◽  
...  
Keyword(s):  
Metal Oxide ◽  
Electron Mobility ◽  
High Performance ◽  
High Electron Mobility Transistor ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
High Electron ◽  
High Electron Mobility ◽  
Enhancement Mode

High power density SiGe millimeter-wave power amplifiers

2011 ◽  
Vol 3 (6) ◽  
pp. 615-620
Author(s):  
Thomas J. Farmer ◽  
Ali Darwish ◽  
Benjamin Huebschman ◽  
Edward Viveiros ◽  
Mona E. Zaghloul
Keyword(s):  
Power Density ◽  
Millimeter Wave ◽  
High Power ◽  
Silicon Germanium ◽  
Complementary Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Center Frequency ◽  
Two Stage ◽  
Chip Area ◽  
Power Added Efficiency

This paper presents measured results for two-stage and three-stage high-voltage/high-power (HiVP) amplifiers implemented in a commercial 0.12 μm silicon germanium (SiGe) heterojunction bipolar transistor (HBT) bipolar Complementary Metal Oxide Semiconductor (BiCMOS) process at millimeter wave. The HiVP configuration provides a new tool for millimeter-wave silicon designers to achieve large output voltage swings, high output power density, customizable bias, and a way to minimize, if not eliminate, matching circuitry at millimeter-wave frequencies. The two-stage amplifier has achieved a PSAT = 5.41 dBm with a power added efficiency (PAE) of 8.06% at center frequency 30 GHz. The three-stage amplifier has achieved a PSAT = 8.85 dBm with a PAE of 11.35% with a total chip area of 0.068 mm2 at center frequency 30 GHz. Simulation, layout, fabrication, and measurement results are presented in this paper.

Sign in / Sign up

Export Citation Format

Share Document