scholarly journals Study of the influence of ozone-air mixture supply conditions on the process of the photoresist removal from the silicon wafer surface

Doklady BGUIR ◽  
2020 ◽  
Vol 18 (6) ◽  
pp. 57-65
Author(s):  
O. I. Tsikhan ◽  
S. I. Madveika ◽  
S. V. Bordusau ◽  
A. L. Barakhoev ◽  
P. V. Kamlach
Keyword(s):  
Silicon Wafer ◽  
Gas Flow ◽  
Removal Rate ◽  
Temperature Drop ◽  
Complete Removal ◽  
Silicon Wafers ◽  
Wafer Surface ◽  
Mixture Flow ◽  
Heated Sample ◽  
Temperature Regimes

The study is devoted to the research of the dependence of the processing results of photoresistive films on the silicon wafers surface in an ozone environment on the conditions and parameters of the process. The high oxidizing potential of ozone justifies the possibility of its use for removing organic films under atmospheric pressure. The experiments were carried out using the developed research bench, in which the mode and method of heating, as well as the method of supplying gas to the surface of the photoresist, were varied. Silicon wafers with a formed 1,35-μm thick masking photoresist film were used as experimental samples. It was found expedient that uniform heating of the plate over its entire surface can be achieved using a ceramic IR heater. When the ozone-air mixture was introduced into the center of the heated sample, the presence of the removed photoresist residues was observed, which was associated with a temperature drop in its surface area. To solve this problem, the computer models of the temperature regimes of the reaction volume elements were calculated. They showed that the scattering of the working gas flow over the surface of the silicon wafer would significantly increase the efficiency of photoresist removal, and with a good selection of the treatment regime it would ensure complete removal of the photoresist. The data obtained were experimentally confirmed by using an ozone-air mixture flow separator. Experiments were carried out to study the effect of the distance from the wafer surface to the working gas inlet on the photoresist removal rate. They showed that a decrease in the distance reduces the ozone loss due to thermal decomposition and, consequently, increases the material removal rate.

Analysis of the Reactant Gas Flow and Heat Transfer on the Silicon Wafer Surface Arranged in a Row in Heating Furnace

2002 ◽  
Vol 2002 (0) ◽  
pp. 275-276
Author(s):  
Naoko SAITO ◽  
Kazushige KIKUTA ◽  
Yukio HISHINUMA ◽  
Takemi CHIKAHISA ◽  
Toshimitsu MIYATA ◽  
...  
Keyword(s):  
Heat Transfer ◽  
Silicon Wafer ◽  
Gas Flow ◽  
Heating Furnace ◽  
Wafer Surface ◽  
Flow And Heat Transfer ◽  
Silicon Wafer Surface

Study on Grinding Performance of Soft Abrasive Wheel for Silicon Wafer

2009 ◽  
Vol 416 ◽  
pp. 529-534 ◽  
Author(s):  
Ren Ke Kang ◽  
Shang Gao ◽  
Zhu Ji Jin ◽  
Dong Ming Guo
Keyword(s):  
Silicon Wafer ◽  
Chemical Reaction ◽  
Removal Rate ◽  
Surface Damage ◽  
Amorphous Layer ◽  
Diamond Wheel ◽  
Wafer Surface ◽  
Abrasive Wheel ◽  
Grinding Performance ◽  
Diamond Abrasive

With the development of IC manufacturing technology, the machining precision and surface quality of silicon wafer are proposed much higher, but now the planarization techniques of silicon wafer using free abrasive and bonded abrasive have the disadvantage of poor profile accuracy, environmental pollution, deep damage layer, etc. A soft abrasive wheel combining chemical and medical effect was developed in this paper, it could get super smooth, low damage wafer surface by utilizing mechanical friction of abrasives and chemical reaction among abrasives, additives, silicon. A comparison experiment between #3000 soft abrasive wheel and #3000 diamond abrasive wheel was given to study on the grinding performance of soft abrasive wheel. The results showed that: wafer surface roughness ground by soft abrasive wheel was sub-nanometer and its sub-surface damage was only 0.01µm amorphous layer, which were much better than silicon wafer ground by diamond abrasive wheel, but material removal rate and grinding ratio of soft abrasive wheel were lower than diamond wheel. The wafer surface ground by soft abrasive wheel included Ce4+, Ce3+, Si4+, Ca2+ and Si, which indicated that the chemical reaction really occurred during grinding process.

scholarly journals Simulation of silicon wafers heating during rapid thermal processing using “UBTO 1801” unit

Doklady BGUIR ◽  
2020 ◽  
Vol 18 (7) ◽  
pp. 79-86
Author(s):  
J. A. Solovjov ◽  
V. A. Pilipenko ◽  
V. P. Yakovlev
Keyword(s):  
Mathematical Model ◽  
Silicon Wafer ◽  
Thermal Processing ◽  
Rapid Thermal Processing ◽  
Light Flux ◽  
Silicon Wafers ◽  
Wafer Surface ◽  
Constant Density ◽  
Wafer Temperature

The present work is devoted to determination of the dependence of the heating temperature of the silicon wafer on the lamps power and the heating time during rapid thermal processing using “UBTO 1801” unit by irradiating the wafer backside with an incoherent flow of constant density light. As a result, a mathematical model of silicon wafer temperature variation was developed on the basis of the equation of nonstationary thermal conductivity and known temperature dependencies of the thermophysical properties of silicon and the emissivity of aluminum and silver applied to the planar surface of the silicon wafer. For experimental determination of the numerical parameters of the mathematical model, silicon wafers were heated with light single pulse of constant power to the temperature of one of three phase transitions such as aluminum-silicon eutectic formation, aluminum melting and silver melting. The time of phase transition formation on the wafer surface during rapid thermal processing was fixed by pyrometric method. In accordance with the developed mathematical model, we determined the conversion coefficient of the lamps electric power to the light flux power density with the numerical value of 5.16∙10-3 cm-2 . Increasing the lamps power from 690 to 2740 W leads to an increase in the silicon wafer temperature during rapid thermal processing from 550°to 930°K, respectively. With that, the wafer temperature prediction error in compliance with developed mathematical model makes less than 2.3 %. The work results can be used when developing new procedures of rapid thermal processing for silicon wafers.

Machining Characteristics of Semibonded Abrasive Grinding Plate

2008 ◽  
Vol 53-54 ◽  
pp. 173-178
Author(s):  
Ju Long Yuan ◽  
Yi Yang ◽  
Zhi Wei Wang ◽  
Dong Qiang Yu ◽  
Miao Qian ◽  
...  
Keyword(s):  
Surface Roughness ◽  
Silicon Wafer ◽  
Removal Rate ◽  
Abrasive Particle ◽  
Precision Machining ◽  
Wafer Surface ◽  
Abrasive Machining ◽  
Fine Surface ◽  
Ultra Precision ◽  
Machining Characteristics

This work aims to obtain fine surface of silicon wafer during precision and ultra precision machining, and presents a new method called semibonded abrasive machining. A semibonded abrasive grinding plate is used in the semibonded abrasive machining. Abrasive particle of 1000# Green SiC and bond named SSB are adopted in the manufacture of the plate. Four plates with different concentration of bond which are 1.5%, 2.5%, 3.5%, 4.5% respectively are made. The paper studies the effect of concentration of bond, the control parameters which include the lapping time, the load, and the rotating velocity of the plate on the surface roughness. Experimental results indicate each plate with different concentration of bond can obtain fine surface roughness. When the load or the rotating velocity increases, there is little effect on the surface roughness, but the material removal rate increases correspondingly. The initial roughness of the silicon wafer surface lapping by the plate could be improved from Ra 0.2μm to Ra 0.02μm in 9 min.

Study on Pad Conditioning Parameters in Silicon Wafer CMP Process

2007 ◽  
Vol 359-360 ◽  
pp. 309-313 ◽  
Author(s):  
Zhao Zhong Zhou ◽  
Ju Long Yuan ◽  
Bing Hai Lv ◽  
Jia Jin Zheng
Keyword(s):  
Surface Structure ◽  
Silicon Wafer ◽  
Material Removal Rate ◽  
Material Removal ◽  
Removal Rate ◽  
Chemical Mechanical Planarization ◽  
Wafer Surface ◽  
Orthogonal Experiments ◽  
Pad Conditioning ◽  
High Level

Polishing pad plays a key role in determining polish rate and planarity of a chemical mechanical planarization (CMP). The properties of the pad would deteriorate during polishing because of pad surface grazing, which results in reduced removal rates and poorer planarity of wafer surface. Pad conditioning and its influence on pad surface structure and CMP process is introduced and discussed in this paper. The study shows that the surface structure can be regenerated by breaking up the glazed areas with conditioner, MRR(Material Removal Rate) can be maintained at high level with proper pad conditioning, and UN(Non-uniformity)can also improved. Orthogonal experiments design is employed in this study to determine the best conditioning parameters.

Effect of FA/O Chelating Agent on Copper Ion Removing on Silicon Surface

2011 ◽  
Vol 183-185 ◽  
pp. 2284-2287
Author(s):  
Bai Mei Tan ◽  
Xin Huan Niu ◽  
Yan Gang He ◽  
Bao Hong Gao ◽  
Yu Ling Liu
Keyword(s):  
Silicon Wafer ◽  
Removal Rate ◽  
Substrate Surface ◽  
Copper Ion ◽  
Chelating Agent ◽  
Wafer Surface ◽  
Cleaning Solution ◽  
Microelectronics Technology ◽  
Cu Pollution ◽  
Silicon Substrate Surface

Along with the feature size reducing and the increase of integration level rapidly in ULSI，the request for metal impurities contamination on silicon substrate surface appears specially rigorous. In this paper the chelating agent was added in cleaning solution in order to removing copper ion. FA/O, a new kind of chelating agent was studied in RCA cleaning solutions, which has 13 chelating rings and is free of sodium, stable and easily soluble. The XPS and GFAAS measured results indicate that FA/O is more efficient than NH4OH as a ligand. Cu contaminations on silicon wafer can be removed remarkably when adding a little FA/O to the cleaning solution or polishing slurry. When the chelating agent concentration of cleaning solution is 0.1% the removal rate of Cu atom reaches 83 percent. The FA/O chelating agent substituting NH4OH in SC-1 may simplify cleaning steps, and one cleaning step can remove Cu pollution on silicon wafer surface and meet the requirements of microelectronics technology.

Hydrophobic Silicon-Direct Bonding for Fabrication of RF Microwave Devices

Manufacturing ◽  
2003 ◽  
Author(s):  
Iqbal K. Bansal
Keyword(s):  
Silicon Wafer ◽  
Failure Modes ◽  
Elevated Temperatures ◽  
Silicon Wafers ◽  
Electrical Performance ◽  
High Resistivity ◽  
Wafer Surface ◽  
Scanning System ◽  
Epitaxial Silicon ◽  
Thermal Bonding

Direct wafer bonding (DWB) is an operation of ultra-fine alignment, joining and thermal bonding of two silicon wafers. The first silicon wafer “handle” substrate is a Czochralski (<CZ>) substrate with N+ arsenic dopant with very low bulk resistivity, whereas second wafer “device” is a float-zone (<FZ>) having extremely high resistivity N-phosphorus dopant. Prior to the joining step, silicon wafers are chemically cleaned in order to minimize surface contamination. The wafer surface is “hydrophobic” which is achieved using an insitu oxide etching process. The surface quality is also characterized in terms of sub-micron light point defects (LPD’s) counts and haze concentration using a laser beam scanning system. After chemical clean, none of the LPD’s counts is greater than 1.0 μ size. The joining step is performed in a Class 100 or better environment by employing a commercial joiner. Then, thermal bonding operation is carried out by employing an extended stream oxidation cycle at elevated temperatures. Typical failure modes of DWB are misalignment errors and “voided” or “disbonded” regions. The area of “voided” regions for each bonded pair is determined by employing a scanning acoustic microscope. Detailed product throughtput and yield data are presented in this paper. A spreading resistivity profile (SRP) system is employed for accurate measurement of doping carrier concentration as a function of the depth. The superior uniformity for capacitance-voltage characteristics of a Si-Si bonded wafer versus an inverse epitaxial silicon wafer substrate is shown in terms of the device performance. The applications of silicon-direct wafer bonded substrates provide a quantum jump in the device electrical performance of PIN diodes.

Optimizing the Within Wafer Non-Uniformity at the Chemical Mechanical Planarization step in Interposers and RDL fabrication process for 3D IC stacking

2019 ◽  
Vol 2019 (1) ◽  
pp. 000450-000453
Author(s):  
Amit Kumar ◽  
Jose Chacon ◽  
Peter Gelzinis ◽  
Ankineedu Velaga
Keyword(s):  
Relative Velocity ◽  
Removal Rate ◽  
Chemical Mechanical Planarization ◽  
Silicon Wafers ◽  
Fabrication Process ◽  
Wafer Surface ◽  
Slurry Flow ◽  
3D Ic ◽  
Standard Guideline ◽  
Slurry Composition

Abstract Chemical Mechanical Planarization (CMP) is an integral step in fabrication processes of through silicon via based Interposer and Redistribution layer for routing. The key motivation in the CMP process is to achieve planarization with minimum recess and dishing on the metal routing sites. In this work we established the metrics for Within-wafer non-uniformity (WIWNU) and optimized the CMP parameters. Currently, there is no standard guideline for reporting the WIWNU during CMP and thus a better understanding and practice is needed to enhance post CMP uniformity across the wafer. The work reported in this article were conducted on 200 mm silicon wafers with either Copper or Tungsten to optimize the uniformity of removal rate with respect to polishing parameters, such as slurry flow, slurry composition, down force, relative velocity of wafer surface with pad, etc. With optimized CMP parameters for blank wafer, the WIWNU in patterned wafer were evaluated and analyzed for additional optimization in non-uniformity.

Modeling and Analyzing on Nonuniformity of Material Removal in Chemical Mechanical Polishing of Silicon Wafer

2004 ◽  
Vol 471-472 ◽  
pp. 26-31 ◽  
Author(s):  
Jian Xiu Su ◽  
Dong Ming Guo ◽  
Ren Ke Kang ◽  
Zhu Ji Jin ◽  
X.J. Li ◽  
...  
Keyword(s):  
Silicon Wafer ◽  
Chemical Mechanical Polishing ◽  
Material Removal ◽  
Mechanical Polishing ◽  
Wafer Surface ◽  
Removal Mechanism ◽  
Particle Movement ◽  
Material Removal Mechanism ◽  
The Relationship ◽  
Nonuniform Material

Chemical mechanical polishing (CMP) has already become a mainstream technology in global planarization of wafer, but the mechanism of nonuniform material removal has not been revealed. In this paper, the calculation of particle movement tracks on wafer surface was conducted by the motion relationship between the wafer and the polishing pad on a large-sized single head CMP machine. Based on the distribution of particle tracks on wafer surface, the model for the within-wafer-nonuniformity (WIWNU) of material removal was put forward. By the calculation and analysis, the relationship between the motion variables of the CMP machine and the WIWNU of material removal on wafer surface had been derived. This model can be used not only for predicting the WIWNU, but also for providing theoretical guide to the design of CMP equipment, selecting the motion variables of CMP and further understanding the material removal mechanism in wafer CMP.

scholarly journals The Influence of Wire Speed on Phase Transitions and Residual Stress in Single Crystal Silicon Wafers Sawn by Resin Bonded Diamond Wire Saw

Micromachines ◽  
2021 ◽  
Vol 12 (4) ◽  
pp. 429
Author(s):  
Tengyun Liu ◽  
Peiqi Ge ◽  
Wenbo Bi
Keyword(s):  
Residual Stress ◽  
Surface Layer ◽  
Phase Transitions ◽  
Single Crystal ◽  
Amorphous Silicon ◽  
Silicon Wafer ◽  
Single Crystal Silicon ◽  
Silicon Wafers ◽  
Crystal Silicon ◽  
Diamond Wire

Lower warp is required for the single crystal silicon wafers sawn by a fixed diamond wire saw with the thinness of a silicon wafer. The residual stress in the surface layer of the silicon wafer is the primary reason for warp, which is generated by the phase transitions, elastic-plastic deformation, and non-uniform distribution of thermal energy during wire sawing. In this paper, an experiment of multi-wire sawing single crystal silicon is carried out, and the Raman spectra technique is used to detect the phase transitions and residual stress in the surface layer of the silicon wafers. Three different wire speeds are used to study the effect of wire speed on phase transition and residual stress of the silicon wafers. The experimental results indicate that amorphous silicon is generated during resin bonded diamond wire sawing, of which the Raman peaks are at 178.9 cm−1 and 468.5 cm−1. The ratio of the amorphous silicon surface area and the surface area of a single crystal silicon, and the depth of amorphous silicon layer increases with the increasing of wire speed. This indicates that more amorphous silicon is generated. There is both compressive stress and tensile stress on the surface layer of the silicon wafer. The residual tensile stress is between 0 and 200 MPa, and the compressive stress is between 0 and 300 MPa for the experimental results of this paper. Moreover, the residual stress increases with the increase of wire speed, indicating more amorphous silicon generated as well.

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