Attainment of low subthreshold slope in planar inversion-channel InGaAs MOSFET with in-situ deposited Al2O3/Y2O3 as a gate dielectric

2021 ◽  
Author(s):  
Lawrence Boyu Young ◽  
Jun Liu ◽  
Yen-Hsun Glen Lin ◽  
Hsien-Wen Wan ◽  
Li-Shao Chiang ◽  
...  
Keyword(s):  
Gate Dielectric ◽  
Field Effect Transistors ◽  
State Of The Art ◽  
Oxide Semiconductor ◽  
Subthreshold Slope ◽  
Temperature Dependent ◽  
Metal Gate ◽  
Inversion Channel ◽  
Slope Factor

Abstract We have demonstrated a record low 85 mV/dec subthreshold slope (SS) at 300 K among the planar inversion-channel InGaAs metal-oxide-semiconductor field-effect transistors (MOSFETs). Our MOSFETs using in-situ deposited Al2O3/Y2O3 as a gate dielectric were fabricated with a self-aligned inversion-channel metal-gate-first process. The temperature-dependent transfer characteristics showed a linear reduction of SS versus temperature, with attainment of an SS of 22 mV/dec at 77 K; the value is comparable to that of the state-of-the-art InGaAs FinFET. The slope factor of SS with temperature (m) is 1.33, which is lower than those reported in the planar InGaAs MOSFETs.

Stacked Metal Layers as Gates for MOSFET Threshold Voltage Control

2003 ◽  
Vol 765 ◽  
Author(s):  
Wei Gao ◽  
John F. Conley ◽  
Yoshi Ono Sharp
Keyword(s):  
Metal Oxide ◽  
Work Function ◽  
Threshold Voltage ◽  
Gate Dielectric ◽  
Field Effect Transistors ◽  
Metal Layer ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Flat Band ◽  
Metal Gate

AbstractTwo layer metal gate stacks allow the effective work function to be tuned by varying the thickness of the first metal layer. Metal-oxide-semiconductor (MOS) capacitors were fabricated by using two metals of very different work functions on thermal oxide gate dielectric where the bottom layer thickness is varied over a range from 0 to 50nm. Electrical and thermal stability measurements were performed on the Al on TaN metal gate stack. The effective workfunction is seen to shift from the value of one metal to the other rapidly as the thickness of the first metal layer is varied from 0 to approximately 10nm. The flat band voltage (Vfb) transition matches the workfunction difference of the two metals in the stack. The advantage of this approach when applied to metal-oxide-semiconductor-field-effect-transistors (MOSFETs) is that it allows the effective workfunction of the metal stack, and the threshold voltage (Vth) of the device to be fine tuned. It also allows for eventual dual gate complementary MOS (CMOS) device fabrication where two different work function metal stacks are necessary, without processing directly on the gate dielectric. A model is proposed to elucidate the workfunction tuning mechanism.

scholarly journals Atomic Layer Deposition (ALD) of Metal Gates for CMOS

2019 ◽  
Vol 9 (11) ◽  
pp. 2388 ◽  
Author(s):  
Chao Zhao ◽  
Jinjuan Xiang
Keyword(s):  
Atomic Layer Deposition ◽  
Field Effect Transistors ◽  
Material Selection ◽  
Atomic Layer ◽  
Oxide Semiconductor ◽  
Metal Gate ◽  
Gate Stack ◽  
Short Channel ◽  
Metal Gates ◽  
Layer Deposition

The continuous down-scaling of complementary metal oxide semiconductor (CMOS) field effect transistors (FETs) had been suffering two fateful technical issues, one relative to the thinning of gate dielectric and the other to the aggressive shortening of channel in last 20 years. To solve the first issue, the high-κ dielectric and metal gate technology had been induced to replace the conventional gate stack of silicon dioxide layer and poly-silicon. To suppress the short channel effects, device architecture had changed from planar bulk Si device to fully depleted silicon on insulator (FDSOI) and FinFETs, and will transit to gate all-around FETs (GAA-FETs). Different from the planar devices, the FinFETs and GAA-FETs have a 3D channel. The conventional high-κ/metal gate process using sputtering faces conformality difficulty, and all atomic layer deposition (ALD) of gate stack become necessary. This review covers both scientific and technological parts related to the ALD of metal gates including the concept of effect work function, the material selection, the precursors for the deposition, the threshold voltage (Vt) tuning of the metal gate in contact with HfO2/SiO2/Si. The ALD of n-type metal gate will be detailed systematically, based mainly on the authors’ works in last five years, and the all ALD gate stacks will be proposed for the future generations based on the learning.

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