Implementation of the DES Algorithm on EDA Box

2013 ◽  
Vol 325-326 ◽  
pp. 1702-1705
Author(s):  
Xue Mei Li ◽  
Li Li

The EDA (Electronic Design Automation) technique which provides us an alternative method of circuit system based on the PC and information technology is a novel technique in modern electronic engineering field. Research on implementation of the DES (data encryption standard) has been paid much attention. In this paper, a description of the DES implementation on EDA box is presented in an alternative method which is suitable for EDA experimental teaching. The DES is set to different parts according to EDA experimental content. We introduce in detail the sub-circuits which consist of the circuits of the DES from simple units to large scale parts, which is easy for students or beginners to learn hardware implementation of cipher algorithm.

Author(s):  
Samir El Adib ◽  
Naoufal Raissouni

<span lang="EN-US">Advanced Encryption Standard (AES) adopted by the National Institute of Standards and Technology (NIST) to replace existing Data Encryption Standard (DES), as the most widely used encryption algorithm in many security applications. Up to today, AES standard has key size variants of 128, 192, and 256-bit, where longer bit keys provide more secure ciphered text output. In the hardware perspective, bigger key size also means bigger area and small throughput. Some companies that employ ultra-high security in their systems may look for a key size bigger than 128-bit AES. In this paper, 128, 192 and 256-bit AES hardware are implemented and compared in terms of throughput and area. The target hardware used in this paper is Virtex XC5VLX50 FPGA from Xilinx. Total area and Throughput results are presented and graphically compared.</span>


2021 ◽  
Vol 1 (2) ◽  
pp. 8-16
Author(s):  
Abdulmajeed Adil Yazdeen ◽  
Subhi R. M. Zeebaree ◽  
Mohammed Mohammed Sadeeq ◽  
Shakir Fattah Kak ◽  
Omar M. Ahmed ◽  
...  

In recent days, increasing numbers of Internet and wireless network users have helped accelerate the need for encryption mechanisms and devices to protect user data sharing across an unsecured network. Data security, integrity, and verification may be used due to these features. In internet traffic encryption, symmetrical block chips play an essential role. Data Encryption Standard (DES) and Advanced Encryption Standard (AES) ensure privacy encryption underlying data protection standards. The DES and the AES provide information security. DES and AES have the distinction of being introduced in both hardware and applications. DES and AES hardware implementation has many advantages, such as increased performance and improved safety. This paper provides an exhaustive study of the implementation by DES and AES of field programming gate arrays (FPGAs) using both DES and AES. Since FPGAs can be defined as just one mission, computers are superior to them.


Author(s):  
Homayoun Khoshravan ◽  
Homayoun Khoshravan

The main goal of the research is to analyze the global warming impact on Urmia lake vulnerabiliy and hazard. By the study of topographic maps, satellite images and field research, the various types of coasts were identified: mud flats, salt marshes, sandy or cliffed coasts, and islands. Moreover the interpretation of seismic profiles, has led to recognize so important morphological features in the lake bed, such as: erosive channels, colos, mud volcanoes, the raised sandy masses and under water mounts. The main results illustrate the variable morphological behavior of Urmia Lake in different parts of the lake.


1990 ◽  
Vol 22 (3-4) ◽  
pp. 291-298
Author(s):  
Frits A. Fastenau ◽  
Jaap H. J. M. van der Graaf ◽  
Gerard Martijnse

More than 95 % of the total housing stock in the Netherlands is connected to central sewerage systems and in most cases the wastewater is treated biologically. As connection to central sewerage systems has reached its economic limits, interest in on-site treatment of the domestic wastewater of the remaining premises is increasing. A large scale research programme into on-site wastewater treatment up to population equivalents of 200 persons has therefore been initiated by the Dutch Ministry of Housing, Physical Planning and Environment. Intensive field-research work did establish that the technological features of most on-site biological treatment systems were satisfactory. A large scale implementation of these systems is however obstructed in different extents by problems of an organisational, financial and/or juridical nature and management difficulties. At present research is carried out to identify these bottlenecks and to analyse possible solutions. Some preliminary results are given which involve the following ‘bottlenecks':-legislation: absence of co-ordination and absence of a definition of ‘surface water';-absence of subsidies;-ownership: divisions in task-setting of Municipalities and Waterboards; divisions involved with cost-sharing;-inspection; operational control and maintenance; organisation of management;-discharge permits;-pollution levy;-sludge disposal. Final decisions and practical elaboration of policies towards on-site treatment will have to be formulated in a broad discussion with all the authorities and interest groups involved.


Author(s):  
Ting Liu ◽  
Zhe Cui ◽  
Hongquan Pu ◽  
Jintao Rao

The article for the journal Recent Advances in Electrical and Electronic Engineering has been withdrawn on the request of the authors due to some technical errors in the article. Bentham Science apologizes to the readers of the journal for any inconvenience this may cause. BENTHAM SCIENCE DISCLAIMER: It is a condition of publication that manuscripts submitted to this journal have not been published and will not be simultaneously submitted or published elsewhere. Furthermore, any data, illustration, structure or table that has been published elsewhere must be reported, and copyright permission for reproduction must be obtained. Plagiarism is strictly forbidden, and by submitting the article for publication the authors agree that the publishers have the legal right to take appropriate action against the authors, if plagiarism or fabricated information is discovered. By submitting a manuscript the authors agree that the copyright of their article is transferred to the publishers if and when the article is accepted for publication.


Author(s):  
Zhengting Zhang ◽  
Guiyun Yi ◽  
Xiaodong Wang ◽  
Peng Li ◽  
Zhuoyan Wan ◽  
...  

2021 ◽  
Vol 11 (15) ◽  
pp. 6688
Author(s):  
Jesús Romero Leguina ◽  
Ángel Cuevas Rumin ◽  
Rubén Cuevas Rumin

The goal of digital marketing is to connect advertisers with users that are interested in their products. This means serving ads to users, and it could lead to a user receiving hundreds of impressions of the same ad. Consequently, advertisers can define a maximum threshold to the number of impressions a user can receive, referred to as Frequency Cap. However, low frequency caps mean many users are not engaging with the advertiser. By contrast, with high frequency caps, users may receive many ads leading to annoyance and wasting budget. We build a robust and reliable methodology to define the number of ads that should be delivered to different users to maximize the ROAS and reduce the possibility that users get annoyed with the ads’ brand. The methodology uses a novel technique to find the optimal frequency capping based on the number of non-clicked impressions rather than the traditional number of received impressions. This methodology is validated using simulations and large-scale datasets obtained from real ad campaigns data. To sum up, our work proves that it is feasible to address the frequency capping optimization as a business problem, and we provide a framework that can be used to configure efficient frequency capping values.


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