Research on Improved AES Encryption Algorithm

2014 ◽  
Vol 989-994 ◽  
pp. 1861-1864
Author(s):  
Zi Heng Yang ◽  
Na Li ◽  
Li Yuan Liu ◽  
Ren Ji Qi ◽  
Ling Ling Yu

AES (Advanced Encryption Standard) in May 26, 2002 became effective standard. AES algorithm research has become a hot topic at home and abroad, and the algorithm has been widely applied in the field of information security. Since the algorithm of AES key expansion part is open, so the key is between the wheel can be derived from each other, the AES algorithm designed for this security risk by generating pseudo-random number. Logistic mapping a certain length, after quantization is used as a key to improve the security of the AES algorithm.

Cryptography ◽  
2020 ◽  
pp. 129-141
Author(s):  
Filali Mohamed Amine ◽  
Gafour Abdelkader

Advanced Encryption Standard is one of the most popular symmetric key encryption algorithms to many works, which have employed to implement modified AES. In this paper, the modification that has been proposed on AES algorithm that has been developed to decrease its time complexity on bulky data and increased security will be included using the image as input data. The modification proposed itself including alteration in the mix column and shift rows transformation of AES encryption algorithm, embedding confusion-diffusion. This work has been implemented on the most recent Xilinx Spartan FPGA.


Author(s):  
Filali Mohamed Amine ◽  
Gafour Abdelkader

Advanced Encryption Standard is one of the most popular symmetric key encryption algorithms to many works, which have employed to implement modified AES. In this paper, the modification that has been proposed on AES algorithm that has been developed to decrease its time complexity on bulky data and increased security will be included using the image as input data. The modification proposed itself including alteration in the mix column and shift rows transformation of AES encryption algorithm, embedding confusion-diffusion. This work has been implemented on the most recent Xilinx Spartan FPGA.


Cryptography plays a major role in the network security. In order to secure the data one must do encryption of the original message. In this paper, the design and analysis of high speed and high performance BLOWFISH algorithm is implemented in VHDL coding and compared with AES (Advanced Encryption Standard) algorithm. The BLOWFISH algorithm involves the process of giving the data and key as input to the encryption block. BLOWFISH encryption algorithm is designed and programmed in VHDL coding. Then it is implemented in Xilinx 10.1. This research is carried in the following steps: designing of encryption algorithm, writing VHDL code, simulating the code on “ModelSim altera 6.5e”, synthesizing and implementing the code using Xilinx’s ISE 10.1.This research aims in developing flexible and technology independent architectures in the areas of VPN software, file compression, public domain software such as smart cards, etc. Also presents the comparison of BLOWFISH and AES algorithms. Experimental results show that BLOWFISH algorithm runs faster than AES algorithm while both of them consume almost the same Power.


2012 ◽  
Vol 220-223 ◽  
pp. 2698-2701
Author(s):  
Yang Yu ◽  
Shi Min Wang

AES is a new generation encryption standard which is designed by the American National Institute of Standards and Technology (NIST) to replace DES. This paper described the concrete steps of the AES encryption algorithm which take the 128-bit keys as an example, including SubBytes, ShiftRows, MixColumns and AddRoundKey, and a detailed study of the IC card data encryption with the application of the AES algorithm.


Cryptographic algorithms are the fundamental element of security protocols and applications. They need to evolve to face the advance cyber security threats. This paper presents an encryption algorithm in which plaintext is encrypted using Shuffled 2-Dimension Key. Each time when a block is encrypted, the key is shuffled. Next time when a block is encrypted the key is different. Cipher text is more secured with shuffling 2-Dimension key as compared with same without shuffling 2-Dimension key. The results of 2-dimension array (shuffled and without shuffled) are compared with Advanced Encryption Standard (AES) algorithm. Same character is encrypted in different way as the key get changed due to shuffling.


Author(s):  
Heidilyn V Gamido

<span>The paper proposes a modification of the Advanced Encryption Standard (AES) to address its high computational requirement steaming from the complex mathematical operations in the MixColumns Transformation which makes the encryption process slow. Bit Permutation was used instead of the MixColumns Transformation since the use of bit permutation in an encryption algorithm achieves efficiency by providing minimum encryption time and memory requirement. Results of the study showed that the modified AES algorithm exhibited faster encryption by 18.47% and faster decryption by 18.77% for text files. The modified AES algorithm also resulted to 16.53% higher avalanche effect compared with the standard AES thus improving the security performance. Application of the modified AES in encrypting images in Cipher Block Chaining mode showed that the modified algorithm also exhibited 16.88% faster encryption and 11.96% decryption compared with the standard AES. Likewise, modifying the algorithm achieved the ideal result in the histogram analysis, information entropy, the correlation coefficient of adjacent pixels to resist statistical attack.  The ideal value in number of pixels change rate and unified average change intensity were also achieved making the modified algorithm resistant to differential attack. These results show that modifying AES by using bit permutation to replace MixColumns Transformation was able to address the high computational requirement of the algorithm resulting in a faster and more secure encryption algorithm for text files and images</span><span>.</span>


Author(s):  
Samir El Adib ◽  
Naoufal Raissouni

<span lang="EN-US">Advanced Encryption Standard (AES) adopted by the National Institute of Standards and Technology (NIST) to replace existing Data Encryption Standard (DES), as the most widely used encryption algorithm in many security applications. Up to today, AES standard has key size variants of 128, 192, and 256-bit, where longer bit keys provide more secure ciphered text output. In the hardware perspective, bigger key size also means bigger area and small throughput. Some companies that employ ultra-high security in their systems may look for a key size bigger than 128-bit AES. In this paper, 128, 192 and 256-bit AES hardware are implemented and compared in terms of throughput and area. The target hardware used in this paper is Virtex XC5VLX50 FPGA from Xilinx. Total area and Throughput results are presented and graphically compared.</span>


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