Conductivity Switching Behaviors in ZrO2 and YSZ Films Deposited by Pulsed Laser Depositions

2006 ◽  
Vol 306-308 ◽  
pp. 1301-1306
Author(s):  
S.H. Kim ◽  
I.S. Byun ◽  
I.R. Hwang ◽  
J.S. Choi ◽  
B.H. Park ◽  
...  

Polycrystalline ZrO2 and yttria-stablilized ZrO2 thin films have been deposited on Pt/Ti/SiO2/Si substrates by pulsed laser deposition methods. Pt/ZrO2/Pt and Pt/YSZ/Pt capacitor structures show giant conductivity switching behaviors which can be utilized for nonvolatile memory devices. Maximum on/off ratio of 106 and good endurance even after 105 times conductivity switching are observed in a typical Pt/ZrO2/Pt whose ZrO2 film has been deposited at 100 °C and an oxygen pressure of 50 mTorr. The Pt/ZrO2/Pt structure exhibits two ohmic behaviors in the low voltage region (V < 1.4 V) depending on the value of previously applied high voltage and Schottky-type conduction in the high voltage region (1.4 V < V < 8.9 V). It seems that conductivity switching behaviors in our Pt/ZrO2/Pt structure result from the changes in both the Schottky barrier and the bulk conductivity controlled by applied voltages. A Pt/YSZ/Pt capacitor structure has more stable reset voltage and current state than a Pt/ZrO2/Pt capacitor structure. Moreover, a Pt/YSZ/Pt capacitor structure shows higher Conductivity than a Pt/ZrO2/Pt capacitor structure, which may result from substitution of Y3+ ions for Zr4+ ions.

2011 ◽  
Vol 1337 ◽  
Author(s):  
Chia-Han Yang ◽  
Yue Kuo ◽  
Chen-Han Lin ◽  
Way Kuo

ABSTRACTThe nanocrystalline ITO embedded Zr-doped HfO2 high-k dielectric thin film has been made into MOS capacitors for nonvolatile memory studies. The devices showed large charge storage densities, large memory windows, and long charge retention times. In this paper, authors investigated the temperature effect on the charge transport and reliability of this kind of device in the range of 25°C to 125°C. The memory window increased with the increase of the temperature. The temperature influenced the trap and detrap of not only the deeply-trapped but also the loosely-trapped charges. The device lost its charge retention capability with the increase of the temperature. The Schottky emission relationship fitted the device in the positive gate voltage region. However, the Frenkel-Poole mechanism was suitable in the negative gate voltage region.


2021 ◽  
Vol 11 (24) ◽  
pp. 11972
Author(s):  
Igor V. Ershov ◽  
Anatoly A. Lavrentyev ◽  
Natalia V. Prutsakova ◽  
Olga M. Holodova ◽  
Irina V. Mardasova ◽  
...  

This paper reports on the pulsed laser deposition of nanocarbon films on metal and dielectric substrates, using high-purity sacrificial carbon tape as a carbon source on a neutral gas background. The films were characterized by X-ray diffraction (XRD), photoelectron (XPS) and Raman spectroscopy. The XRD and Raman structural analyses revealed that the synthesized films have a graphenic nanocrystalline turbostratic structure, with sp2 clusters about 15–18 nm in size, depending on the laser fluence. A significant decrease in the oxygen and hydrogen contents in the films, in comparison with the target material, was established using XPS, as well as a significant decrease in the sp3 carbon content. The deposited films were found to be similar to reduced graphene oxide (rGO) in composition, with a surprisingly low number of defects in the sp2-matrix. The method proposed in the work may have good prospects of application in the production of energy storage and nonvolatile memory devices.


1999 ◽  
Vol 567 ◽  
Author(s):  
E. M. Dons ◽  
C. S. Skowronski ◽  
K. R. Farmer

ABSTRACTWe report the electrical characterization of a direct tunneling diode structure that incorporates a multilayer dielectric. The dielectric consists of a stack of two thermally grown, ultrathin SiO2 layers, each ∼3.5 rin thick, separated by a deposited, continuous, undoped, ultrathin nanocrystalline Si layer ∼5.0 nm thick. Electrical measurements of this structure are reported for both n-type and p-type Si substrates. We find that the room temperature transport through this structure is accounted for by describing the intermediate Si layer as a quantum well with a continuum of states, and by otherwise assuming bulk properties for the ultrathin layers, such as the existence of a bandgap in the Si well and the usual Si-SiO2 interface potential barrier height at all interfaces. This structure is expected to be useful as the active dielectric in nonvolatile memory devices.


2013 ◽  
Vol 2013 ◽  
pp. 1-5 ◽  
Author(s):  
Fu-Chien Chiu

Bipolar resistance switching characteristics are demonstrated in Pt/ZnO/Pt nonvolatile memory devices. A negative differential resistance or snapback characteristic can be observed when the memory device switches from a high resistance state to a low resistance state due to the formation of filamentary conducting path. The dependence of pulse width and temperature on set/reset voltages was examined in this work. The exponentially decreasing trend of set/reset voltage with increasing pulse width is observed except when pulse width is larger than 1 s. Hence, to switch the ZnO memory devices, a minimum set/reset voltage is required. The set voltage decreases linearly with the temperature whereas the reset voltage is nearly temperature-independent. In addition, the ac cycling endurance can be over 106switching cycles, whereas, the dependence of HRS/LRS resistance distribution indicates that a significant memory window closure may take place after about 102  dc switching cycles.


2007 ◽  
Vol 997 ◽  
Author(s):  
Sung Hyun Jo ◽  
Wei Lu

AbstractM/a-Si:H/c-Si based nonvolatile resistive switching devices with active areas down to 50 nm×50 nm have been fabricated and explored. Close to 100% device yield was achieved without necessity of high voltage forming process. Both rectifying switching and non-rectifying switching were demonstrated in a controllable fashion. The potential for this structure as nanoscale nonvolatile memory devices was investigated in terms of scalability, retention time, endurance and switching speed. The device showed switching speed faster than 5 ns, endurance cycles more than 106 and retention time longer than 150 days without any degradation of stored data. The devices exhibit improved resistance switching ratio when scaled down.


2003 ◽  
Vol 24 (2) ◽  
pp. 99-101 ◽  
Author(s):  
B. Govoreanu ◽  
P. Blomme ◽  
M. Rosmeulen ◽  
J. Van Houdt ◽  
K. De Meyer

Author(s):  
S. G. Ghonge ◽  
E. Goo ◽  
R. Ramesh ◽  
R. Haakenaasen ◽  
D. K. Fork

Microstructure of epitaxial ferroelectric/conductive oxide heterostructures on LaAIO3(LAO) and Si substrates have been studied by conventional and high resolution transmission electron microscopy. The epitaxial films have a wide range of potential applications in areas such as non-volatile memory devices, electro-optic devices and pyroelectric detectors. For applications such as electro-optic devices the films must be single crystal and for applications such as nonvolatile memory devices and pyroelectric devices single crystal films will enhance the performance of the devices. The ferroelectric films studied are Pb(Zr0.2Ti0.8)O3(PLZT), PbTiO3(PT), BiTiO3(BT) and Pb0.9La0.1(Zr0.2Ti0.8)0.975O3(PLZT).Electrical contact to ferroelectric films is commonly made with metals such as Pt. Metals generally have a large difference in work function compared to the work function of the ferroelectric oxides. This results in a Schottky barrier at the interface and the interfacial space charge is believed to responsible for domain pinning and degradation in the ferroelectric properties resulting in phenomenon such as fatigue.


2009 ◽  
Vol 129 (8) ◽  
pp. 1511-1517
Author(s):  
Nicodimus Retdian ◽  
Jieting Zhang ◽  
Takahide Sato ◽  
Shigetaka Takagi

2002 ◽  
Vol 716 ◽  
Author(s):  
K.L. Ng ◽  
N. Zhan ◽  
M.C. Poon ◽  
C.W. Kok ◽  
M. Chan ◽  
...  

AbstractHfO2 as a dielectric material in MOS capacitor by direct sputtering of Hf in an O2 ambient onto a Si substrate was studied. The results showed that the interface layer formed between HfO2 and the Si substrate was affected by the RTA time in the 500°C annealing temperature. Since the interface layer is mainly composed of hafnium silicate, and has high interface trap density, the effective barrier height is therefore lowered with increased RTA time. The change in the effective barrier height will affect the FN tunneling current and the operation of the MOS devices when it is applied for nonvolatile memory devices.


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