Three-Dimensional Simulation of Proposed Ring-Confined-Chalcogenide Phase-Change Memory for Reducing Reset Operation Current

2016 ◽  
Vol 698 ◽  
pp. 149-153
Author(s):  
You Yin ◽  
Sumio Hosaka

In this paper, we proposed a phase-change memory (PCM) structure which has a ring confined chalcogenide (RCC) for reducing reset operation current. The temperature distributions of normal bottom contact (NBC), confined chalcogenide (CC) and proposed RCC PCMs were simulated by 3 dimensional finite element method. It was very clear that a much higher temperature can be obtained for RCC than NBC cell at a certain programming current. The programming characteristics also exhibited that the operation current of RCC cell can be as low as about 45% of NBC cell while that of CC cell was about 82% of CC cell.

2009 ◽  
Vol 152-153 ◽  
pp. 399-402 ◽  
Author(s):  
S. Harnsoongnoen ◽  
Chiranut Sa-Ngiamsak ◽  
Apirat Siritaratiwat

This paper reports on the confined-chalcogenide phase change memory with thin metal interlayer (CCTMI) with the operating reset current of 0.6mA-30ns. This cell offers low reset current with simple architecture and fabrication. Thermal and heat flux distribution of both the normal-bottom-contact (NBC) and a proposed CCTMI PCM cells were carefully analyzed and simulated by two-dimensional finite element modeling. It is intriguingly found that the reset operation current of the CCTMI cell is 44% lower than that of the NBC. CCTMI has capability to solve an over-programming fail issue due to confined heat dissipation in active area.


2014 ◽  
Vol 543-547 ◽  
pp. 471-474
Author(s):  
Qian Wang ◽  
Hou Peng Chen ◽  
Yi Yun Zhang ◽  
Xi Fan ◽  
Xi Li ◽  
...  

Design of a novel initialization circuit is presented in this paper. The initialization circuit is used to supply initialization current to the first test of phase change memory chip after delivery. Inhomogeneous crystalline grain sizes appear in phase change materials used in memory cells during manufacturing process. The crystalline phase with low resistance will convert to amorphous phase with high resistance after initialization, which is called RESET the memory cells to 0. Normal RESET operation current is not high enough to RESET great grain, which deteriorates bit yield of phase change memory chip. In comparison, the higher initialization current will increase bit yield observably.


2003 ◽  
Vol 803 ◽  
Author(s):  
L. P. Shi ◽  
T. C. Chong ◽  
J. M. Li ◽  
H. X. Yang ◽  
J. Q. Mou

ABSTRACTIn this paper, a three-dimensional finite-element modeling is performed for the analyses of Chalcogenide Random Access Memory (C-RAM), a non-rotation nonvolatile phase change memory cell. The thermal effect generated by an incident electric pulse was mainly discussed. Thermal performances of the cell as a result of electrical and geometrical variations were quantified. Current density distribution, temperature profiles, temperature history, heating rate, cooling rate, and heat flow characteristics were obtained and analyzed. The study is useful for the failure analysis of the C-RAM.


Author(s):  
B. Rajendran ◽  
J. Karidis ◽  
M-H. Lee ◽  
M. Breitwisch ◽  
G. W. Burr ◽  
...  

2016 ◽  
Vol 2016 ◽  
pp. 1-5 ◽  
Author(s):  
Lei Wang ◽  
Si-Di Gong ◽  
Jing Wen ◽  
Ci Hui Yang

Scanning probe phase-change memory (SPPCM) has been widely considered as one of the most promising candidates for next-generation data storage devices due to its fast switching time, low power consumption, and potential for ultra-high density. Development of a comprehensive model able to accurately describe all the physical processes involved in SPPCM operations is therefore vital to provide researchers with an effective route for device optimization. In this paper, we introduce a pseudo-three-dimensional model to simulate the electrothermal and phase-transition phenomena observed during the SPPCM writing process by simultaneously solving Laplace’s equation to model the electrical process, the classical heat transfer equation, and a rate equation to model phase transitions. The crystalline bit region of a typical probe system and the resulting current-voltage curve obtained from simulations of the writing process showed good agreement with experimental results obtained under an equivalent configuration, demonstrating the validity of the proposed model.


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