Effect of Post-Oxidation Annealing in Wet O2 and N2O Ambient on Thermally Grown SiO2/4H-SiC Interface for P-Channel MOS Devices

2012 ◽  
Vol 717-720 ◽  
pp. 709-712 ◽  
Author(s):  
Shuji Katakami ◽  
Manabu Arai ◽  
Kensuke Takenaka ◽  
Yoshiyuki Yonezawa ◽  
Hitoshi Ishimori ◽  
...  

We investigated the effect of post-oxidation annealing in wet O2 and N2O ambient, following dry O2 oxidation on the SiC MOS interfacial properties by using p-type MOS capacitors. The interfacial properties were dramatically improved by the introduction of hydrogen or nitrogen atoms into the SiO2/SiC interface, in each POA process. Notably, the N2O-POA process at 1200 °C or higher reduced the interface state density more effectively than the wet-O2-POA process, and offers a promising method to further improve the inversion channel mobility of p-channel SiC MOS devices.

2019 ◽  
Vol 114 (24) ◽  
pp. 242101 ◽  
Author(s):  
Tsubasa Matsumoto ◽  
Hiromitsu Kato ◽  
Toshiharu Makino ◽  
Masahiko Ogura ◽  
Daisuke Takeuchi ◽  
...  

2011 ◽  
Vol 276 ◽  
pp. 87-93
Author(s):  
Y.Y. Gomeniuk ◽  
Y.V. Gomeniuk ◽  
A. Nazarov ◽  
P.K. Hurley ◽  
Karim Cherkaoui ◽  
...  

The paper presents the results of electrical characterization of MOS capacitors and SOI MOSFETs with novel high-κ LaLuO3 dielectric as a gate oxide. The energy distribution of interface state density at LaLuO3/Si interface is presented and typical maxima of 1.2×1011 eV–1cm–2 was found at about 0.25 eV from the silicon valence band. The output and transfer characteristics of the n- and p-MOSFET (channel length and width were 1 µm and 50 µm, respectively) are presented. The front channel mobility appeared to be 126 cm2V–1s–1 and 70 cm2V–1s–1 for n- and p-MOSFET, respectively. The front channel threshold voltages as well as the density of states at the back interface are presented.


2009 ◽  
Vol 615-617 ◽  
pp. 789-792
Author(s):  
Masato Noborio ◽  
Jun Suda ◽  
Tsunenobu Kimoto

P-channel MOSFETs have been fabricated on 4H-SiC (0001) face as well as on 4H-SiC (03-38) and (11-20) faces. The gate oxides were formed by thermal oxidation in dry N2O ambient, which is widely accepted to improve the performance of n-channel SiC MOSFETs. The p-channel SiC MOSFETs with N2O-grown oxides on 4H-SiC (0001), (03-38), and (11-20) faces show a channel mobility of 7 cm2/Vs, 11 cm2/Vs, and 17 cm2/Vs, respectively. From the quasi-static C-V curves measured by using gate-controlled diodes, the interface state density was calculated by an original method. The interface state density was the lowest at the SiO2/4H-SiC (03-38) interface (about 1x1012 cm-2eV-1 at EV + 0.2 eV). The authors have applied deposited oxides to the 4H-SiC p-channel MOSFETs. The (0001), (03-38), and (11-20) MOSFETs with deposited oxides exhibit a channel mobility of 10 cm2/Vs, 13 cm2/Vs, and 17 cm2/Vs, respectively. The deposited oxides are one of effective approaches to improve both n-channel and p-channel 4H-SiC MOS devices.


2006 ◽  
Vol 527-529 ◽  
pp. 1525-1528
Author(s):  
W. Huang ◽  
T. Khan ◽  
T. Paul Chow

Both n-type and p-type GaN MOS capacitors with plasma-enhanced CVD-SiO2 as the gate oxide were characterized using both capacitance and conductance techniques. From a n type MOS capacitor, an interface state density of 3.8×1010/cm2-eV was estimated at 0.19eV near the conduction band and decreases deeper into the bandgap while from a p type MOS capacitor, an interface state density of 1.4×1011/cm2-eV 0.61eV above the valence band was estimated and decreases deeper into the bandgap. Unlike the symmetric interface state density distribution in Si, an asymmetric interface state density distribution with lower density near the conduction band and higher density near the valence band has been determined.


2013 ◽  
Vol 740-742 ◽  
pp. 506-509 ◽  
Author(s):  
Toru Hiyoshi ◽  
Takeyoshi Masuda ◽  
Keiji Wada ◽  
Shin Harada ◽  
Yasuo Namikawa

In this paper, we characterized MOS devices fabricated on 4H-SiC (0-33-8) face. The interface state density of SiO2/4H-SiC(0-33-8) was significantly low compared to that of SiO2/4H-SiC(0001). The field-effect channel mobility obtained from lateral MOSFET (LMOSFET) was 80 cm2/Vs, in spite of a high p-well concentration of 5x1017 cm-3 (implantation). The double implanted MOSFET (DMOSFET) fabricated on 4H-SiC(0-33-8) showed a specific on-resistance of 4.0 mΩcm2 with a blocking voltage of 890 V.


2002 ◽  
Vol 742 ◽  
Author(s):  
Hiroshi Yano ◽  
Taichi Hirao ◽  
Tsunenobu Kimoto ◽  
Hiroyuki Matsunami

ABSTRACTThe interface properties of MOS capacitors and MOSFETs were characterized using the (0001), (1120), and (0338) faces of 4H-SiC. (0001) and (1120) correspond to (111) and (110) in cubic structure. (0338) is semi-equivalent to (100). The interface states near the conduction band edge are discussed based on the capacitance and conductance measurements of n-type MOS capacitors at a low temperature and room temperature. The (0338) face indicated the smallest interface state density near the conduction band edge and highest channel mobility in n-channel MOSFETs among these faces.


2000 ◽  
Vol 622 ◽  
Author(s):  
G.Y. Chung ◽  
C.C. Tin ◽  
J. R. Williams ◽  
K. McDonald ◽  
M. Di Ventra ◽  
...  

ABSTRACTResults are reported for the passivation of interface states near the conduction band edge in n-4H-SiC using post-oxidation anneals in nitric oxide, ammonia and forming gas (N2/5%H2). Anneals in nitric oxide and ammonia reduce the interface state density significantly, while forming gas anneals are largely ineffective. Results suggest that interface states in SiO2/SiC and SiO2/Si have different origins, and a model is described for interface state passivation by nitrogen in the SiO2/SiC system. The inversion channel mobility of 4H-SiC MOSFETs increases with the NO annealing.


2019 ◽  
Vol 8 (3) ◽  
pp. 5505-5508

Interface states of MOS structures capacitors incorporated with low levels of phosphorous have been investigated by conductance and C-ψs method. The frequency response of interface states was observed by the conductance method up to 10 MHz. The correlation between the frequency response of interface states and interface state density determined by C-ψs method was studied. It was found that fast states in phosphorous incorporated samples reduced significantly at high frequency (>5 MHz) while sample annealed with nitrogen remained high up to 10 MHz. The interface state density, Dit of phosphorous incorporated sample near conduction band is lower compared to nitridated sample. These results indicate phosphorous passivation effectively reduces Dit at the SiO2 /SiC interfaces and can be correlated to high channel mobility.


2010 ◽  
Vol 1246 ◽  
Author(s):  
Dai Okamoto ◽  
Hiroshi Yano ◽  
Shinya Kotake ◽  
Kenji Hirata ◽  
Tomoaki Hatayama ◽  
...  

AbstractWe propose a new technique to fabricate 4H-SiC metal–oxide–semiconductor field-effect transistors (MOSFETs) with high inversion channel mobility. P atoms were incorporated into the SiO2/4H-SiC(0001) interface by post-oxidation annealing using phosphoryl chloride (POCl3). The interface state density at 0.2 eV from the conduction band edge was reduced to less than 1 × 1011 cm−2eV−1 by the POCl3 annealing at 1000 °C. The peak field-effect mobility of 4H-SiC MOSFETs on (0001) Si-face processed with POCl3 annealing at 1000 °C was approximately 90 cm2/Vs. The high channel mobility is attributed to the reduced interface state density near the conduction band edge.


2006 ◽  
Vol 527-529 ◽  
pp. 1043-1046 ◽  
Author(s):  
Kenji Fukuda ◽  
Makoto Kato ◽  
Shinsuke Harada ◽  
Kazutoshi Kojima

SiC power MOSFETs are expected to be normally-off type fast switching devices. The on-resistance of SiC power MOSFETs is much higher than the value predicted from the physical properties of SiC. This is caused by the low channel mobility due to high interface state density (Dit). We have already reported that 4H-SiC MOSFETs on the C(0001 _ ) face had higher inversion-channel mobility. However, there is the SiO2/SiC interface roughness problem in SiC MOSFETs. There are many steps at the SiO2/SiC interface because a high off-angle is necessary for SiC epitaxial growth. These steps might make SiO2/SiC interfaces rough, which leads to reduction of channel mobility. In this work, we have investigated the effect of the SiO2/SiC interface roughness caused by the off-angle on the inversion channel mobility of 4H-SiC MOSFETs fabricated on the C(0001 _ ) face. The inversion-channel mobility of MOSFETs fabricated on the 4H-SiC C(0001 _ ) face substrate with the vicinal off-angle(0.8°) is higher than that of MOSFETs fabricated on the 4H-SiC C(0001 _ ) face substrate with the 8° off-angle. Reduction of the off-angle is very useful for improvement of channel mobility. A C(0001 _ ) epitaxial substrate with the vicinal off-angle would be suitable for SiC DMOSFETs.


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