GaN MOS Structures with Low Interface Trap Density
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GaN based electronic devices have gained great success in the arena of high-frequency and high-power applications. A high-quality GaN MOS structure has the potential to enable new device designs and higher device performance, thereby bringing the success of GaN electronics to a new level. This paper discusses results of the work on GaN MOS structures show that with adequate surface preparation samples featuring interface trap density down to the ~ 1010 eV-1cm-2 range can be formed.
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2015 ◽
Vol 7
(23)
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pp. 12774-12780
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2013 ◽
Vol 690-693
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pp. 1846-1850
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2007 ◽
Vol 28
(3)
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pp. 232-234
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2008 ◽
Vol 55
(2)
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pp. 547-556
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