CMOS Analog Front-End IC for Gas Sensors

An electrochemical sensor readout analog front-end (AFE) IC for recording long term chemical and gas exposure is presented. The AFE readout circuit enables the detection of exhaust fumes in hazardous diesel and gasoline equipment, which helps correlate atmospheric pollutants with severe illnesses. The AFE reads out the output of eight conductometric sensor arrays and eight amperometric sensor arrays. The IC consists of a low noise potentiostat and associated 9 bits current-steering DAC for sensor stimulus, followed by the first order nested chopped ΣΔ ADC. The conductometric sensor uses a current driven approach for extracting resistance change of the sensor depending on gas concentration. The amperometric sensor uses a potentiostat to apply constant voltage for measuring current out of the sensor after a chemical reaction. The core area for the AFE is 2.65x0.95 mm2. The IC is fabricated in 0.18μm CMOS process and achieves 91dB SNR with 1.32mW power consumption per channel from a 1.8 V supply. With digital offset storage and nested chopping, the readout IC achieves 500 μV input referred offset. In order to use the system with AFE as part of a compact badge with battery, the entire gas detection system has been designed in 3D layers with a bio sensor mounted layer, an AFE layer, power management layer, a micro controller layer, and battery.

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14.85 µW Analog Front-End for Photoplethysmography Acquisition with 142-dBΩ Gain and 64.2-pArms Noise

Sensors ◽

10.3390/s19030512 ◽

2019 ◽

Vol 19 (3) ◽

pp. 512

Author(s):

Binghui Lin ◽

Mohamed Atef ◽

Guoxing Wang

Keyword(s):

Dynamic Range ◽

Automatic Gain Control ◽

Gain Control ◽

Low Noise ◽

Total Power ◽

Cmos Process ◽

Control Block ◽

Silicon Area ◽

Front End ◽

Analog Front End

A low-power, high-gain, and low-noise analog front-end (AFE) for wearable photoplethysmography (PPG) acquisition systems is designed and fabricated in a 0.35 μm CMOS process. A high transimpedance gain of 142 dBΩ and a low input-referred noise of only 64.2 pArms was achieved. A Sub-Hz filter was integrated using a pseudo resistor, resulting in a small silicon area. To mitigate the saturation problem caused by background light (BGL), a BGL cancellation loop and a new simple automatic gain control block are used to enhance the dynamic range and improve the linearity of the AFE. The measurement results show that a DC photocurrent component up-to-10 μA can be rejected and the PPG output swing can reach 1.42 Vpp at THD < 1%. The chip consumes a total power of 14.85 μW using a single 3.3-V power supply. In this work, the small area and efficiently integrated blocks were used to implement the PPG AFE and the silicon area is minimized to 0.8 mm × 0.8 mm.

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A 0.5 V 68 nW ECG Monitoring Analog Front-End for Arrhythmia Diagnosis

Journal of Low Power Electronics and Applications ◽

10.3390/jlpea8030027 ◽

2018 ◽

Vol 8 (3) ◽

pp. 27 ◽

Cited By ~ 2

Author(s):

Avish Kosari ◽

Jacob Breiholz ◽

NingXi Liu ◽

Benton Calhoun ◽

David Wentzloff

Keyword(s):

Low Power ◽

Power Efficiency ◽

Low Noise ◽

Signal Acquisition ◽

Cmos Process ◽

Ecg Signal ◽

Ecg Monitoring ◽

Power Circuit ◽

Front End ◽

Analog Front End

This paper presents a power efficient analog front-end (AFE) for electrocardiogram (ECG) signal monitoring and arrhythmia diagnosis. The AFE uses low-noise and low-power circuit design methodologies and aggressive voltage scaling to satisfy both the low power consumption and low input-referred noise requirements of ECG signal acquisition systems. The AFE was realized with a three-stage fully differential AC-coupled amplifier, and it provides bio-signal acquisition with programmable gain and bandwidth. The AFE was implemented in a 130 nm CMOS process, and it has a measured tunable mid-band gain from 31 to 52 dB with tunable low-pass and high-pass corner frequencies. Under only 0.5 V supply voltage, it consumes 68 nW of power with an input-referred noise of 2.8 µVrms and a power efficiency factor (PEF) of 3.9, which makes it very suitable for energy-harvesting applications. The low-noise 68nW AFE was also integrated on a self-powered physiological monitoring System on Chip (SoC) that is used to capture ECG bio-signals. Heart rate extraction (R-R) detection algorithms were implemented and utilized to analyze the ECG data received by the AFE, showing the feasibility of <100 nW AFE for continuous ECG monitoring applications.

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Miniaturized 0.13-μm CMOS Front-End Analog for AlN PMUT Arrays

Sensors ◽

10.3390/s20041205 ◽

2020 ◽

Vol 20 (4) ◽

pp. 1205 ◽

Cited By ~ 2

Author(s):

Iván Zamora ◽

Eyglis Ledesma ◽

Arantxa Uranga ◽

Núria Barniol

Keyword(s):

Integrated Circuit ◽

Imaging System ◽

Ultrasonic Transducer ◽

Low Noise ◽

Oxide Semiconductor ◽

Cmos Process ◽

Axial Distance ◽

Cmos Integrated Circuit ◽

Front End ◽

Analog Front End

This paper presents an analog front-end transceiver for an ultrasound imaging system based on a high-voltage (HV) transmitter, a low-noise front-end amplifier (RX), and a complementary-metal-oxide-semiconductor, aluminum nitride, piezoelectric micromachined ultrasonic transducer (CMOS-AlN-PMUT). The system was designed using the 0.13-μm Silterra CMOS process and the MEMS-on-CMOS platform, which allowed for the implementation of an AlN PMUT on top of the CMOS-integrated circuit. The HV transmitter drives a column of six 80-μm-square PMUTs excited with 32 V in order to generate enough acoustic pressure at a 2.1-mm axial distance. On the reception side, another six 80-μm-square PMUT columns convert the received echo into an electric charge that is amplified by the receiver front-end amplifier. A comparative analysis between a voltage front-end amplifier (VA) based on capacitive integration and a charge-sensitive front-end amplifier (CSA) is presented. Electrical and acoustic experiments successfully demonstrated the functionality of the designed low-power analog front-end circuitry, which outperformed a state-of-the art front-end application-specific integrated circuit (ASIC) in terms of power consumption, noise performance, and area.

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A Charge Amplifier Based Complementary Metal–Oxide–Semiconductor Analog Front End for Piezoelectric Microphones in Hearing Aid Devices

Journal of Low Power Electronics ◽

10.1166/jolpe.2019.1615 ◽

2019 ◽

Vol 15 (3) ◽

pp. 315-322

Author(s):

Manu Chilukuri ◽

Sungyong Jung ◽

Hoon-Ju Chung

Keyword(s):

Hearing Aid ◽

Complementary Metal Oxide Semiconductor ◽

Low Noise ◽

Oxide Semiconductor ◽

Cmos Process ◽

Charge Amplifier ◽

Front End ◽

Analog Front End ◽

A Charge ◽

Cascode Current Mirror

In this paper, a low noise and low power analog front end for piezoelectric microphones used in hearing aid devices is presented. It consists of a Charge Amplifier, followed by a Variable Gain Amplifier and an Analog-to-Digital Converter. At the core of charge amplifier a two stage opamp with modified cascode current mirror is designed which achieves a gain of 93 dB and phase margin of 62°. Designed analog front end achieves an input referred noise of 0.12 μVrms and SNR of 74 dB. It consumes power of 430 μW from 1.8 V supply and occupies an area of 1.2 mm × 0.22 mm. Proposed circuit is designed and fabricated in 0.18 μm CMOS process. Designed circuit is interfaced with a sensor model of piezoelectric microphone, which mimics Ormia ochracea's auditory system, and its performance is successfully verified against simulation results.

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A Low Noise Amplifier Suitable for Biomedical Recording Analog Front-End in 65nm CMOS Technology

Journal of Circuits System and Computers ◽

10.1142/s0218126619501378 ◽

2019 ◽

Vol 28 (08) ◽

pp. 1950137

Author(s):

R. Nagulapalli ◽

K. Hayatleh ◽

S. Barker ◽

A. A. Tammam ◽

N. Yassine ◽

...

Keyword(s):

Cmos Technology ◽

Low Noise ◽

Low Noise Amplifier ◽

Current Steering ◽

Silicon Area ◽

Fully Integrated ◽

Front End ◽

Transconductance Amplifier ◽

Analog Front End ◽

Noise Amplifier

This paper presents a fully integrated front-end, low noise amplifier (LNA), dedicated to the processing of various types of bio-medical signals, such as Electrocardiogram (ECG), Electroencephalography (EEG), Axon Action Potential (AAP). A novel noise reduction technique, for an operational transconductance amplifier (OTA), has been proposed. This adds a current steering branch parallel to the differential pair, with a view to reducing the noise contribution by the cascode current sources. Hence, this reduces the overall input-referred noise of the LNA, without adding any additional power. The proposed technique implemented in 65[Formula: see text]nm CMOS technology achieves 30 dB closed-loop voltage gain, 0.05[Formula: see text]Hz lower cut-off frequency and 100 MHz 3-dB bandwidth. It operates at 1.2[Formula: see text]V power supply and draws 1[Formula: see text][Formula: see text]A static current. The prototype described in this paper occupies 3300[Formula: see text][Formula: see text]m2 silicon area.

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