Experimental reliability studies and SPICE simulation for EEPROM at temperatures up to 450 °C

The paper presents reliability studies of single polysilicon EEPROM cells at temperatures from 50 °C to 450 °C. The technically challenging measurements at elevated temperatures above 250 °C have been carried out for accelerated reliability studies. Furthermore, a SPICE macro model has been extended to the wide temperature range to describe the retention and endurance performance of the memory cell and to enable a better insight into the physics involved.

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Experimental Reliability Studies and SPICE Simulation for EEPROM at Temperatures up to 450°C

Journal of Microelectronics and Electronic Packaging ◽

10.4071/imaps.487 ◽

2016 ◽

Vol 13 (1) ◽

pp. 33-37

Author(s):

A. Kelberer ◽

S. Dreiner ◽

K. Grella ◽

D. Dittrich ◽

H. Kappert ◽

...

Keyword(s):

Wide Temperature Range ◽

Elevated Temperatures ◽

Endurance Performance ◽

Memory Cell ◽

Spice Simulation ◽

Macro Model ◽

Temperature Range ◽

Read Only Memory ◽

Insight Into

This article presents reliability studies of single polysilicon electrically erasable programmable read-only memory (EEPROM) cells at temperatures from 50°C to 450°C. The technically challenging measurements at elevated temperatures >250°C have been carried out for accelerated reliability studies. Furthermore, a SPICE macro model has been extended to the wide temperature range to describe the retention and endurance performance of the memory cell and to enable a better insight into the physics involved.

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CMOS Circuits on Silicon Carbide for High Temperature Operation

MRS Proceedings ◽

10.1557/opl.2014.599 ◽

2014 ◽

Vol 1693 ◽

Cited By ~ 4

Author(s):

David T. Clark ◽

Robin F. Thompson ◽

Aled E. Murphy ◽

David A. Smith ◽

Ewan P. Ramsay ◽

...

Keyword(s):

Silicon Carbide ◽

High Temperature ◽

Wide Temperature Range ◽

Integrated Circuit ◽

Elevated Temperatures ◽

Logic Circuits ◽

Digital Logic ◽

Cmos Integrated Circuit ◽

Temperature Range ◽

Simple Logic

ABSTRACTWe present the characteristics of a high temperature CMOS integrated circuit process based on 4H silicon carbide designed to operate at temperatures beyond 300°C. N-channel and P-channel transistor characteristics at room and elevated temperatures are presented. Both channel types show the expected low values of field effect mobility well known in SiC MOSFETS. However the performance achieved is easily capable of exploitation in CMOS digital logic circuits and certain analogue circuits, over a wide temperature range.Data is also presented for the performance of digital logic demonstrator circuits, in particular a 4 to 1 analogue multiplexer and a configurable timer operating over a wide temperature range. Devices are packaged in high temperature ceramic dual in line (DIL) packages, which are capable of greater than 300°C operation. A high temperature “micro-oven” system has been designed and built to enable testing and stressing of units assembled in these package types. This system heats a group of devices together to temperatures of up to 300°C while keeping the electrical connections at much lower temperatures. In addition, long term reliability data for some structures such as contact chains to n-type and p-type SiC and simple logic circuits is summarized.

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Electron Transport Features in Heterostructures 3C-SiC(n)/Si(p) at the Elevated Temperatures

Materials Science Forum ◽

10.4028/www.scientific.net/msf.740-742.498 ◽

2013 ◽

Vol 740-742 ◽

pp. 498-501

Author(s):

A.V. Afanasyev ◽

V.A. Ilyin ◽

V.V. Luchinin ◽

A.S. Petrov

Keyword(s):

Electron Transport ◽

Charge Transport ◽

Wide Temperature Range ◽

Silicon Substrate ◽

Elevated Temperatures ◽

Reverse Current ◽

Current Generation ◽

Temperature Range ◽

Working Temperature ◽

Transport Diffusion

3C-SiC (n) / Si (p) heterostructures were obtained and investigated in a wide temperature range. It was shown, the main mechanisms of charge transport diffusion and recombination. The properties of silicon substrate were determining the working temperature range of investigated diodes. Therefore the rectifying properties of 3С-SiC(n)/Si(p) diodes were stable only up to 473 K. Two sites with different activation energies were observed on the Jrev(1/T) curves at fixed voltage: 0,32 eV which, characterized states on the SiC/Si interface, Е2 ≈ 0,55 eV which corresponds to the middle of silicon bandgap and defines existence of reverse current generation component.

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A new insight into hard low friction MoCN–Ag coatings intended for applications in wide temperature range

Materials & Design ◽

10.1016/j.matdes.2015.12.131 ◽

2016 ◽

Vol 93 ◽

pp. 63-72 ◽

Cited By ~ 31

Author(s):

A.V. Bondarev ◽

Ph.V. Kiryukhantsev-Korneev ◽

D.A. Sidorenko ◽

D.V. Shtansky

Keyword(s):

Wide Temperature Range ◽

Low Friction ◽

Temperature Range ◽

Insight Into

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A dual-phase alloy with ultrahigh strength-ductility synergy over a wide temperature range

Science Advances ◽

10.1126/sciadv.abi4404 ◽

2021 ◽

Vol 7 (34) ◽

pp. eabi4404

Author(s):

Raymond Kwesi Nutor ◽

Qingping Cao ◽

Ran Wei ◽

Qingmei Su ◽

Gaohui Du ◽

...

Keyword(s):

Wide Temperature Range ◽

Elevated Temperatures ◽

Interesting Property ◽

Specific Yield ◽

Dynamic Strain ◽

Face Centered Cubic ◽

High Entropy ◽

Temperature Range ◽

Face Centered ◽

Multiple Deformation

High-entropy alloys (HEAs), as an emerging class of materials, have pointed a pathway in developing alloys with interesting property combinations. Although they are not exempted from the strength-ductility trade-off, they present a standing chance in overcoming this challenge. Here, we report results for a precipitation-strengthening strategy, by tuning composition to design a CoNiV-based face-centered cubic/B2 duplex HEA. This alloy sustains ultrahigh gigapascal-level tensile yield strengths and excellent ductility from cryogenic to elevated temperatures. The highest specific yield strength (~150.2 MPa·cm3/g) among reported ductile HEAs is obtained. The ability of the alloy presented here to sustain this excellent strength-ductility synergy over a wide temperature range is aided by multiple deformation mechanisms i.e., twins, stacking faults, dynamic strain aging, and dynamic recrystallization. Our results open the avenue for designing precipitation-strengthened lightweight HEAs with advanced strength-ductility combinations over a wide service temperature range.

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