A Survey of System Level Power Management Schemes in the Dark-Silicon Era for Many-Core Architectures

AbstractPower-constrained fault-tolerance has emerged as a key challenge in the deep sub-micron technology. Multi-/many-core chips can support different hardening modes considering variants of redundant multithreading (RMT). In dark silicon chips, the maximum number of cores that can simultaneously be powered-on (at the full performance level) is constrained by the thermal design power (TDP). The rest of the cores have to be power-gated (i.e., stay “dark”), or the cores have to operate at a lower performance level. It has been predicted that about 25–50% of a many-core chip can potentially be “dark.” In this chapter, a system-level power–reliability management technique is presented. The technique jointly considers multiple hardening modes at the software and hardware levels, each offering distinct power, reliability, and performance properties. Also, a framework for the system-level optimization is introduced which considers different power–reliability–performance management problems for many-core processors depending upon the target system and user constraints.

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Dynamic power management for many-core platforms in the dark silicon era: A multi-objective control approach

2015 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED) ◽

10.1109/islped.2015.7273517 ◽

2015 ◽

Cited By ~ 22

Author(s):

Amir-Mohammad Rahmani ◽

Mohammad-Hashem Haghbayan ◽

Anil Kanduri ◽

Awet Yemane Weldezion ◽

Pasi Liljeberg ◽

...

Keyword(s):

Power Management ◽

Dynamic Power Management ◽

Dark Silicon ◽

Dynamic Power ◽

Control Approach ◽

Multi Objective ◽

Objective Control ◽

Many Core

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Misalignment in Gas Foil Journal Bearings: An Experimental Study

Volume 1: Aircraft Engine; Ceramics; Coal, Biomass and Alternative Fuels; Manufacturing, Materials and Metallurgy; Microturbines and Small Turbomachinery ◽

10.1115/gt2008-50806 ◽

2008 ◽

Cited By ~ 1

Author(s):

Samuel A. Howard

Keyword(s):

Journal Bearings ◽

System Level ◽

Design Parameters ◽

Foil Bearing ◽

Alignment System ◽

Successful Design ◽

Shaft Alignment ◽

Bearing Force ◽

Management Schemes ◽

Level Performance

As gas foil journal bearings become more prevalent in production machines, such as small gas turbine propulsion systems and microturbines, system level performance issues must be identified and quantified in order to provide for successful design practices. Several examples of system level design parameters that are not fully understood in foil bearing systems are thermal management schemes, alignment requirements, balance requirements, thrust load balancing, and others. In order to address some of these deficiencies and begin to develop guidelines, this paper presents a preliminary experimental investigation of the misalignment tolerance of gas foil journal bearing systems. Using a notional gas foil bearing supported rotor and a laser-based shaft alignment system, increasing levels of misalignment are imparted to the bearing supports while monitoring temperature at the bearing edges. The amount of misalignment that induces bearing failure is identified and compared to other conventional bearing types such as cylindrical roller bearings and angular contact ball bearings. Additionally, the dynamic response of the rotor indicates that the gas foil bearing force coefficients may be affected by misalignment.

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Gem5-X

ACM Transactions on Architecture and Code Optimization ◽

10.1145/3461662 ◽

2021 ◽

Vol 18 (4) ◽

pp. 1-27

Author(s):

Yasir Mahmood Qureshi ◽

William Andrew Simon ◽

Marina Zapater ◽

Katzalin Olcoz ◽

David Atienza

Keyword(s):

Visual Recognition ◽

Energy Savings ◽

Video Encoding ◽

System Level ◽

Heterogeneous Architecture ◽

Video Analytics ◽

Smart Systems ◽

System Level Simulation ◽

Many Core ◽

New Applications

The increasing adoption of smart systems in our daily life has led to the development of new applications with varying performance and energy constraints, and suitable computing architectures need to be developed for these new applications. In this article, we present gem5-X, a system-level simulation framework, based on gem-5, for architectural exploration of heterogeneous many-core systems. To demonstrate the capabilities of gem5-X, real-time video analytics is used as a case-study. It is composed of two kernels, namely, video encoding and image classification using convolutional neural networks (CNNs). First, we explore through gem5-X the benefits of latest 3D high bandwidth memory (HBM2) in different architectural configurations. Then, using a two-step exploration methodology, we develop a new optimized clustered-heterogeneous architecture with HBM2 in gem5-X for video analytics application. In this proposed clustered-heterogeneous architecture, ARMv8 in-order cluster with in-cache computing engine executes the video encoding kernel, giving 20% performance and 54% energy benefits compared to baseline ARM in-order and Out-of-Order systems, respectively. Furthermore, thanks to gem5-X, we conclude that ARM Out-of-Order clusters with HBM2 are the best choice to run visual recognition using CNNs, as they outperform DDR4-based system by up to 30% both in terms of performance and energy savings.

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FoToNoC: A Folded Torus-Like Network-on-Chip Based Many-Core Systems-on-Chip in the Dark Silicon Era

IEEE Transactions on Parallel and Distributed Systems ◽

10.1109/tpds.2016.2643669 ◽

2017 ◽

Vol 28 (7) ◽

pp. 1905-1918 ◽

Cited By ~ 16

Author(s):

Lei Yang ◽

Weichen Liu ◽

Weiwen Jiang ◽

Mengquan Li ◽

Peng Chen ◽

...

Keyword(s):

Network On Chip ◽

Dark Silicon ◽

Systems On Chip ◽

On Chip ◽

Many Core

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Rapid power-management exploration using post-processing of the system-level simulation results

2017 27th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS) ◽

10.1109/patmos.2017.8106965 ◽

2017 ◽

Author(s):

Dominik Macko

Keyword(s):

Power Management ◽

System Level ◽

Post Processing ◽

System Level Simulation ◽

Simulation Results

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Electrical power management and optimization with nonlinear energy harvesting structures

Journal of Intelligent Material Systems and Structures ◽

10.1177/1045389x18808390 ◽

2018 ◽

Vol 30 (2) ◽

pp. 213-227 ◽

Cited By ~ 8

Author(s):

Wen Cai ◽

Ryan L Harne

Keyword(s):

Energy Harvesting ◽

Nonlinear Vibration ◽

Power Management ◽

Partial Information ◽

Electrical Power ◽

System Level ◽

Vibration Energy ◽

Amplitude Dependence ◽

Harvesting Systems ◽

Nonlinear Energy

In recent years, great advances in understanding the opportunities for nonlinear vibration energy harvesting systems have been achieved giving attention to either the structural or electrical subsystems. Yet, a notable disconnect appears in the knowledge on optimal means to integrate nonlinear energy harvesting structures with effective nonlinear rectifying and power management circuits for practical applications. Motivated to fill this knowledge gap, this research employs impedance principles to investigate power optimization strategies for a nonlinear vibration energy harvester interfaced with a bridge rectifier and a buck-boost converter. The frequency and amplitude dependence of the internal impedance of the harvester structure challenges the conventional impedance matching concepts. Instead, a system-level optimization strategy is established and validated through simulations and experiments. Through careful studies, the means to optimize the electrical power with partial information of the electrical load is revealed and verified in comparison to the full analysis. These results suggest that future study and implementation of optimal nonlinear energy harvesting systems may find effective guidance through power flow concepts built on linear theories despite the presence of nonlinearities in structures and circuits.

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