scholarly journals A Solution to Design Semi-static Null Convention Logic Cell Libraries

2021 ◽  
Vol 15 ◽  
pp. 1666-1675
Author(s):  
Lac Truong Tri ◽  
Toi Le Thanh ◽  
Trang Hoang
Keyword(s):  
Process Design ◽  
Electromagnetic Interference ◽  
Asynchronous Circuits ◽  
Clock Skew ◽  
Synchronous Circuits ◽  
Cell Library ◽  
Comparison Results ◽  
Null Convention Logic ◽  
Power Models ◽  
Timing Models

The Null Convention Logic (NCL) based asynchronous circuits have eliminated the disadvantages of the synchronous circuits, including noise, glitches, clock skew, power, and electromagnetic interference. However, using NCL based asynchronous designs was not easy for students and researchers because of the lack of standard NCL cell libraries. This paper proposes a solution to design a semi-static NCL cell library used to synthesize NCL based asynchronous designs. This solution will help researchers save time and effort to approach a new method. In this work, NCL cells are designed based on the Process Design Kit 45nm technology. They are simulated at the different corners with the Ocean script and Electronic Design Automation (EDA) environment to extract the timing models and the power models. These models are used to generate a *.lib file, which is converted to a *.db file by the Design Compiler tool to form a complete library of 27 cells. In addition, we synthesize the NCL based full adders to illustrate the success of the proposed library and compare our synthesis results with the results of the other authors. The comparison results indicate that power and delay are improved significantly.

scholarly journals Burst-Mode Asynchronous Controllers on FPGA

2008 ◽  
Vol 2008 ◽  
pp. 1-10 ◽  
Author(s):  
Duarte L. Oliveira ◽  
Marius Strum ◽  
Sandro S. Sato
Keyword(s):  
Lower Cost ◽  
Asynchronous Circuits ◽  
Asynchronous Design ◽  
Burst Mode ◽  
Synchronous Circuits ◽  
Design Time ◽  
Look Up Table

FPGAs have been mainly used to design synchronous circuits. Asynchronous design on FPGAs is difficult because the resulting circuit may suffer from hazard problems. We propose a method that implements a popular class of asynchronous circuits, known as burst mode, on FPGAs based on look-up table architectures. We present two conditions that, if satisfied, guarantee essential hazard-free implementation on any LUT-based FPGA. By doing that, besides all the intrinsic advantages of asynchronous over synchronous circuits, they also take advantage of the shorter design time and lower cost associated with FPGA designs.

scholarly journals A Novel Strategy for Formal Verication of Asynchronous Circuit Design in PAiD tool

1970 ◽  
Vol 9 (1) ◽  
pp. 64-73
Author(s):  
Tin Thien Nguyen ◽  
Khoi-Nguyen LE-HUU ◽  
Thang H. Bui ◽  
Anh-Vu Dinh-Duc
Keyword(s):  
Circuit Design ◽  
Asynchronous Circuits ◽  
Ho Chi Minh City ◽  
Electronic Systems ◽  
Synchronous Circuits ◽  
University Of Technology ◽  
Long Time ◽  
Novel Strategy ◽  
Asynchronous Circuit Design ◽  
Reliable Software

EDA has been proposed for a long time as a category of reliable software tools for designing electronic systems. Although some of them have been considered as powerful tools for asynchronous circuits, a prominent approach to cope with the biggest defect of synchronous circuits: clock distribution issue, researches in verifying the correctness of those circuits are still limited. Therefore, an enhanced version of PAiD, an EDA tool that has been developed at Ho Chi Minh City University of Technology (HCMUT), will be proposed in this work along with case studies. It will enable engineers not only design, synthesize asynchronous circuits but also verify them. Furthermore, a good strategy to improve the verifying performance is also discussed.

scholarly journals PAID – A NOVEL FRAMEWORK FOR DESIGN AND SIMULATION OF ASYNCHRONOUS CIRCUITS

2011 ◽  
Vol 14 (2) ◽  
pp. 37-45 ◽  
Author(s):  
Vu Duc Anh Dinh
Keyword(s):  
Design Method ◽  
Asynchronous Circuits ◽  
Low Noise ◽  
Design Tool ◽  
Clock Signal ◽  
Levels Of Abstraction ◽  
Synchronous Circuits ◽  
High Level ◽  
Local Synchronization ◽  
Asynchronous Circuit Design

Contrary to the synchronous circuits, the asynchronous circuits operate with a mechanism of local synchronization (without clock signal). For many years, they showed their relevance with respect to the synchronous circuits thanks to their properties of robustness, low power, low noise and modularity. However, the lack of design methods and associated tools prevents them from being widely spread. This paper deals with a new design methodology for integrated asynchronous circuits and EDA tools. The suggested design method allows on one hand to model circuits in a highlevel language, and on the other hand to generate circuits using only elementary logical gates and Muller gates. This method was prototyped by the development of an EDA design tool for asynchronous circuits. The combination of design methodologies and supporting tools creates a design framework for asynchronous circuits, namely PAiD ("Project of Asynchronous Circuit Design"). This framework allows compilation and synthesis of circuits, described by high-level language ADL ("Asynchronous Description Language"), to generate asynchronous circuits. The result of the synthesizer is a functional netlist of the circuits. This netlist can be then mapped to a specific-technology gate library for asynchronous circuits. During the design process, the circuit can be tested through the simulation process in different levels of abstraction.

Perceptions of Stuttering of Different Age Groups

2019 ◽  
Vol 4 (6) ◽  
pp. 1311-1315
Author(s):  
Sergey M. Kondrashov ◽  
John A. Tetnowski
Keyword(s):  
Age Groups ◽  
School Age Children ◽  
Clinical Implications ◽  
School Age ◽  
Fourth Edition ◽  
Self Perception ◽  
Behavioral Measures ◽  
Self Rating ◽  
Comparison Results ◽  
Subject Pool

Purpose The purpose of this study was to assess the perceptions of stuttering of school-age children who stutter and those of adults who stutter through the use of the same tools that could be commonly used by clinicians. Method Twenty-three participants across various ages and stuttering severity were administered both the Stuttering Severity Instrument–Fourth Edition (SSI-4; Riley, 2009 ) and the Wright & Ayre Stuttering Self-Rating Profile ( Wright & Ayre, 2000 ). Comparisons were made between severity of behavioral measures of stuttering made by the SSI-4 and by age (child/adult). Results Significant differences were obtained for the age comparison but not for the severity comparison. Results are explained in terms of the correlation between severity equivalents of the SSI-4 and the Wright & Ayre Stuttering Self-Rating Profile scores, with clinical implications justifying multi-aspect assessment. Conclusions Clinical implications indicate that self-perception and impact of stuttering must not be assumed and should be evaluated for individual participants. Research implications include further study with a larger subject pool and various levels of stuttering severity.

High-voltage monitoring by the fiber-optic recirculating measuring system

2020 ◽  
pp. 38-44
Author(s):  
A. V. Polyakov ◽  
M. A. Ksenofontov
Keyword(s):  
Optical Fibers ◽  
High Voltage ◽  
Optical Sensors ◽  
Electromagnetic Interference ◽  
Fiber Optic ◽  
Electric Power Industry ◽  
Measuring System ◽  
Voltage Range ◽  
External Electromagnetic Fields ◽  
Optic Communication

Optical technologies for measuring electrical quantities attract great attention due to their unique properties and significant advantages over other technologies used in high-voltage electric power industry: the use of optical fibers ensures high stability of measuring equipment to electromagnetic interference and galvanic isolation of high-voltage sensors; external electromagnetic fields do not influence the data transmitted from optical sensors via fiber-optic communication lines; problems associated with ground loops are eliminated, there are no side electromagnetic radiation and crosstalk between the channels. The structure and operation principle of a quasi-distributed fiber-optic high-voltage monitoring system is presented. The sensitive element is a combination of a piezo-ceramic tube with an optical fiber wound around it. The device uses reverse transverse piezoelectric effect. The measurement principle is based on recording the change in the recirculation frequency under the applied voltage influence. When the measuring sections are arranged in ascending order of the measured effective voltages relative to the receiving-transmitting unit, a relative resolution of 0,3–0,45 % is achieved for the PZT-5H and 0,8–1,2 % for the PZT-4 in the voltage range 20–150 kV.

Energy Efficiency Analysis in ERA using NFL-BA Algorithm

2020 ◽  
pp. 340-348
Author(s):  
Palky Mehta ◽  
H. L. Sharma
Keyword(s):  
Cluster Head ◽  
Vital Role ◽  
Wireless Sensor ◽  
Energy Usage ◽  
Cluster Heads ◽  
Comparison Results ◽  
Current Scenario ◽  
Energy Efficiency Analysis ◽  
Selection Of

In the current scenario of Wireless Sensor Network (WSN), power consumption is the major issue associated with nodes in WSN. LEACH technique plays a vital role of clustering in WSN and reduces the energy usage effectively. But LEACH has its own limitation in order to search cluster head nodes which are randomly distributed over the network. In this paper, ERA-NFL- BA algorithm is being proposed for selects the cluster heads in WSN. This algorithm help in selection of cluster heads can freely transform from global search to local search. At the end, a comparison has been done with earlier researcher using protocol ERA-NFL, which clearly shown that proposed Algorithm is best suited and from comparison results that ERA-NFL-BA has given better performance.

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