scholarly journals Effect of Annealing Atmosphere on the Diode Behaviour of ZnO/Si Heterojunction

2021 ◽  
Author(s):  
Sadia Muniza Faraz ◽  
Syed Riaz un Nabi Jafri ◽  
Zarreen Tajvar ◽  
Naveed ul Hassan Alvi ◽  
Qamar-ul Wahab ◽  
...  
Keyword(s):  
Ideality Factor ◽  
Room Temperature ◽  
Series Resistance ◽  
Zno Nanorods ◽  
Annealing Atmosphere ◽  
Electrical Characteristics ◽  
Current Voltage ◽  
Capacitance Voltage ◽  
Growth Method ◽  
Heterojunction Diodes

The effect of thermal annealing atmosphere on the electrical characteristics of Zinc oxide (ZnO) nanorods/p-Silicon (Si) diodes is investigated. ZnO nanorods are grown by low-temperature aqueous solution growth method and annealed in Nitrogen and Oxygen atmosphere. As-grown and annealed nanorods are studied by scanning electron microscopy (SEM) and photoluminescence (PL) spectroscopy. Electrical characteristics of ZnO/Si heterojunction diodes are studied by current-voltage (I-V) and capacitance-voltage (C-V) measurements at room temperature. Improvements in rectifying behaviour, ideality factor, carrier concentration, and series resistance are observed after annealing. The ideality factor of 4.4 for as-grown improved to 3.8 and for Nitrogen and Oxygen annealed improved to 3.5 nanorods diodes. The series resistances decreased from 1.6 to 1.8 times after annealing. An overall improved behaviour is observed for oxygen annealed heterojunction diodes. The study suggests that by controlling the ZnO nanorods annealing temperatures and atmospheres the electronic and optoelectronic properties of ZnO devices can be improved.

Analysis of current–voltage and capacitance–voltage characteristics of Zr/p-Si Schottky diode with high series resistance

2020 ◽  
Vol 34 (10) ◽  
pp. 2050095
Author(s):  
Durmuş Ali Aldemir
Keyword(s):  
Barrier Height ◽  
Schottky Diode ◽  
Ideality Factor ◽  
Series Resistance ◽  
Zero Bias ◽  
Acceptor Concentration ◽  
Current Voltage ◽  
Capacitance Voltage ◽  
High Series ◽  
Contact Parameters

Zr/p-Si Schottky diode was fabricated by DC magnetic sputtering of Zr on p-Si. Zr rectifying contact gave a zero bias barrier height of 0.73 eV and an ideality factor of 1.33 by current–voltage measurement. The experimental zero bias barrier height was higher than the value predicted by metal-induced gap states (MIGSs) and electronegativity theory. The forward bias current was limited by high series resistance. The series resistance value of 9840 [Formula: see text] was determined from Cheung functions. High value of the series resistance was ascribed to low quality ohmic contact. In addition to Cheung functions, important contact parameters such as barrier height and series resistance were calculated by using modified Norde method. Re-evaluation of modified Norde functions was realized in the direction of the method proposed by Lien et al. [IEEE Trans. Electron Devices 31 (1984) 1502]. From the method, the series resistance and ideality factor values were found to be as 41.49 [Formula: see text] and 2.08, respectively. The capacitance–voltage characteristics of the diode were measured as a function of frequency. For a wide range of applied frequency, the contact parameters calculated from [Formula: see text]–[Formula: see text] curves did not exhibit frequency dependence. The barrier height value of 0.71 eV which was in close agreement with the value of zero bias barrier height was calculated from [Formula: see text]–[Formula: see text] plot at 1 MHz. The values of acceptor concentration obtained from [Formula: see text]–[Formula: see text] curves showed consistency with actual acceptor concentration of p-Si.

GaN P-N Structures Fabricated by Mg ION Implantation

1998 ◽  
Vol 537 ◽  
Author(s):  
E.V. Kalinina ◽  
V.A. Solov'ev ◽  
A.S. Zubrilov ◽  
V.A. Dmitriev ◽  
A.P. Kovarsky
Keyword(s):  
Ion Implantation ◽  
Room Temperature ◽  
Implantation Dose ◽  
Electrical Characteristics ◽  
Scattered Electron ◽  
Current Voltage ◽  
Capacitance Voltage ◽  
Electron Beam Induced Current ◽  
P Type ◽  
Secondary Ion

AbstractIn this paper we report on the first GaN p-n diodes fabricated by Mg ion implantation doping of n-type GaN epitaxial layers. Ion implantation was performed at room temperature. Implantation dose ranged from 1013 to 2 × 1016 cm2. After implantation samples were annealed for 10-15 s at a wide temperature interval from 600°C to 1200°C in flowing N2 to form p-type layers. Secondary ion mass spectroscopy, scanning electron microscopy with electron beam induced current and back scattered electron modes as well as current-voltage and capacitance-voltage measurements were used to study structural and electrical characteristics of the Mg implanted p-n structures.

New Method for Improving the Electrical Characteristics of P-N Junction Diode

2011 ◽  
Vol 378-379 ◽  
pp. 606-609 ◽  
Author(s):  
Itsara Srithanachai ◽  
Surada Ueamanapong ◽  
Amporn Poyai ◽  
Surasak Niemcharoen
Keyword(s):  
Carrier Lifetime ◽  
Series Resistance ◽  
Device Performance ◽  
Electrical Characteristics ◽  
X Ray ◽  
Forward Current ◽  
Current Voltage ◽  
Capacitance Voltage ◽  
Current Voltage Characteristics ◽  
Junction Diode

This paper investigates the effect of soft X-ray irradiation various energy and times on P-N junction diodes. X-ray energy irradiated on P-N junction diode with 55 and 70 keV with various time in the range 5-50 sec. After irradiations were study on the current-voltage (I-V) characteristics and capacitance-voltage (C-V) characteristics. Leakages current after irradiated by X-ray are not change, while forward current are increase about 3 orders. The change of current-voltage characteristics can analyze by many parameter such as carrier lifetime and series resistance. Capacitance-voltage characteristics after irradiation are not change. The results show that soft X-ray technique can be improving performance of the P-N junction diodes. These techniques are importance to use for improving device performance in industry work.

scholarly journals Comparison of electrical properties of CuO/n-Si contacts with Cu/n-Si

2020 ◽  
Vol 0 (0) ◽  
Author(s):  
Reşit Özmenteş ◽  
Cabir Temirci
Keyword(s):  
Electrical Properties ◽  
Barrier Height ◽  
Ideality Factor ◽  
Series Resistance ◽  
Reference Sample ◽  
Forward Bias ◽  
Schottky Contact ◽  
Experimental Result ◽  
Current Voltage ◽  
Capacitance Voltage

AbstractIn this study, CuO/n-Si/Al heterojunction contacts were fabricated by thermal evaporation technique. Electrical characteristics of the samples were investigated with the current-voltage (I-V), capacitance-voltage/frequency (C-V/f), and conductance-voltage (G/V) measurements at room temperature. Also, Cu/n-Si/Al Schottky contact was produced as a reference sample to investigate the electrical properties of the samples. The values of ideality factor (n), barrier height (Φb) and series resistance (Rs) of the samples were calculated from the forward bias current-voltage (I-V) and reverse bias capacitance-voltage (C-V) characteristics. Also, for checking the consistency of the results, Cheung and Norde functions were used. The experimental result values of CuO/n-Si contact were compared with the values of the reference Cu/n-Si Schottky diode. It was observed that the values of the ideality factor and barrier height of the CuO/n-Si heterojunction were higher than those of the Cu/n-Si Schottky contact, while the series resistance was lower. Also, it has been observed that the value of capacitance decreased with increasing frequency and after a certain value of frequency it was almost constant. The ideality factor of CuO/n-Si/Al heterostructure is about 2.40 and so, it is not close to the ideal behavior.

Current-Voltage and Capacitance-Voltage Characteristics of Pd Schottky Diodes Fabricated on ZnO Grown along Zn- and O-Faces

2013 ◽  
Vol 313-314 ◽  
pp. 270-274
Author(s):  
M. Faisal ◽  
M. Asghar ◽  
Khalid Mahmood ◽  
Magnus Willander ◽  
O. Nur ◽  
...  
Keyword(s):  
Barrier Height ◽  
Ideality Factor ◽  
Doping Concentration ◽  
Series Resistance ◽  
Schottky Diodes ◽  
Thermionic Emission ◽  
Temperature Dependent ◽  
Current Voltage ◽  
Capacitance Voltage ◽  
Increasing Temperature

Temperature dependent current-voltage (I-V) and capacitance-voltage (C-V) measurements were utilized to understand the transport mechanism of Pd Schottky diodes fabricated on Zn- and O-faces of ZnO. From I-V measurements, in accordance with the thermionic emission mechanism theory, it was found that the series resistance Rsand the ideality factor n were strongly temperature dependent that decreased with increasing temperature for both the faces (Zn and O-face) of ZnO revealing that the thermionic emission is not the dominant process. The barrier height øB(I-V)increased with increasing temperature for both faces. The measured values of ideality factor, barrier height and series resistance for Zn- and O-faces at room temperature were 4.4, 0.60 eV, 217 Ω and 2.8, 0.49 eV, 251 Ω respectively. The capacitance-voltage (C–V) measurements were used to determine the doping concentration Nd, the built-in-potential Vbi, and the barrier height øB(C-V). The doping concentration was found to be decreased with increasing depth. The barrier height øB(C-V)calculated for O-polar and Zn-polar faces decreases with increasing temperature. The values of barrier height øB(C-V)determined from C-V measurements were found higher than the values of barrier height øB(I-V). Keeping in view the calculated values of ideality factor, barrier height, and series resistance shows that O-polar face is qualitatively better than Zn-polar face.

scholarly journals Modeling of the Channel Thickness Influence on Electrical Characteristics and Series Resistance in Gate-Recessed Nanoscale SOI MOSFETs

2013 ◽  
Vol 2013 ◽  
pp. 1-10 ◽  
Author(s):  
A. Karsenty ◽  
A. Chelly
Keyword(s):  
Room Temperature ◽  
Series Resistance ◽  
Electrical Characteristics ◽  
Saturation Current ◽  
Mobility Degradation ◽  
Current Voltage ◽  
Voltage Dependent ◽  
Channel Thickness ◽  
Current Voltage Characteristics ◽  
First Time

Ultrathin body (UTB) and nanoscale body (NSB) SOI-MOSFET devices, sharing a similar W/L but with a channel thickness of 46 nm and lower than 5 nm, respectively, were fabricated using a selective “gate-recessed” process on the same silicon wafer. Their current-voltage characteristics measured at room temperature were found to be surprisingly different by several orders of magnitude. We analyzed this result by considering the severe mobility degradation and the influence of a huge series resistance and found that the last one seems more coherent. Then the electrical characteristics of the NSB can be analytically derived by integrating a gate voltage-dependent drain source series resistance. In this paper, the influence of the channel thickness on the series resistance is reported for the first time. This influence is integrated to the analytical model in order to describe the trends of the saturation current with the channel thickness. This modeling approach may be useful to interpret anomalous electrical behavior of other nanodevices in which series resistance and/or mobility degradation is of a great concern.

Impact of Contact Material Deposition Technique on the Properties of Ti/4H-SiC Schottky Structures

2016 ◽  
Vol 858 ◽  
pp. 569-572 ◽  
Author(s):  
Laura Stöber ◽  
Michael Schneider ◽  
Ulrich Schmid
Keyword(s):  
Ideality Factor ◽  
Room Temperature ◽  
Schottky Barrier Height ◽  
Contact Material ◽  
Deposition Technique ◽  
Material Deposition ◽  
Current Voltage ◽  
Capacitance Voltage ◽  
Magnetron Sputter ◽  
Sputter Deposited

In this paper, we report on the performance of Ti/4H-SiC Schottky junctions, whereas the contact material is either e-beam evaporated or magnetron sputter deposited. When applying the first technique, the Schottky barrier height is lowered at room temperature by about 80 meV or by about 160 meV extracted from current/voltage and capacitance/voltage measurements, respectively. Furthermore, e-beam evaporation of the Ti contact results in an ideality factor closer to 1 when comparing structures of the same design.

Statistical Analysis of the Current–Voltage (I–V) and Capacitance–Voltage (C–V) Characteristics of the Au/Ir/n-InGaN Schottky Barrier Diodes

2018 ◽  
Vol 24 (8) ◽  
pp. 5582-5586
Author(s):  
R Padma ◽  
V. Rajagopal Reddy
Keyword(s):  
Schottky Barrier ◽  
Ideality Factor ◽  
Series Resistance ◽  
Electron Beam Evaporation ◽  
Statistical Distribution ◽  
Schottky Barrier Diodes ◽  
Shunt Resistance ◽  
Current Voltage ◽  
Capacitance Voltage ◽  
The Mean

In the present work, 20 Au/Ir/n-InGaN Schottky barrier diodes (SBDs) are fabricated using a electron beam evaporation technique. The Schottky barrier parameters such as ideality factor (n), Schottky barrier height (SBH) (Φb) and donar concentration (Nd) values are determined by current–voltage (I–V) and capacitance–voltage (C–V) measurements at room temperature. From I–V measurements, the statistical distribution of data gives the mean SBH value of 0.70 eV with a normal deviation of 10 meV and mean ideality factor value of 1.50 with a normal deviation of 0.0478. Two important parameters such as series resistance (RS) and shunt resistance (RSh) are also evaluated from the I–V characteristics. Furthermore, Norde and Cheung’s methods are used to evaluate the SBH, ideality factor and series resistance. The statistical distribution of C–V data gives the mean SBH value of 0.91 eV with a normal deviation of 12 meV and mean donar concentration of 0.71 × 1017 cm−3, with a normal deviation of 0.018 × 1017 cm−3 respectively.

scholarly journals GaN p-n Structures Fabricated by Mg Ion Implantation

1999 ◽  
Vol 4 (S1) ◽  
pp. 751-756 ◽  
Author(s):  
E.V. Kalinina ◽  
V.A. Solov’ev ◽  
A.S. Zubrilov ◽  
V.A. Dmitriev ◽  
A.P. Kovarsky
Keyword(s):  
Ion Implantation ◽  
Room Temperature ◽  
Implantation Dose ◽  
Electrical Characteristics ◽  
Scattered Electron ◽  
Current Voltage ◽  
Capacitance Voltage ◽  
Electron Beam Induced Current ◽  
P Type ◽  
Secondary Ion

AbstractIn this paper we report on the first GaN p-n diodes fabricated by Mg ion implantation doping of n-type GaN epitaxial layers. Ion implantation was performed at room temperature. Implantation dose ranged from 1013 to 2×1016 cm−2. After implantation samples were annealed for 10-15 s at a wide temperature interval from 600°C to 1200°C in flowing N2 to form p-type layers. Secondary ion mass spectroscopy, scanning electron microscopy with electron beam induced current and back scattered electron modes as well as current-voltage and capacitance-voltage measurements were used to study structural and electrical characteristics of the Mg implanted p-n structures.

Heterojunction Properties of p-CuO/n-CdS Diode

2015 ◽  
Vol 1098 ◽  
pp. 1-5 ◽  
Author(s):  
Thitinai Gaewdang ◽  
Ngamnit Wongcharoen
Keyword(s):  
Barrier Height ◽  
Ideality Factor ◽  
Room Temperature ◽  
Series Resistance ◽  
Thermionic Emission ◽  
Strong Temperature Dependence ◽  
Ceramic Pellet ◽  
Forward Current ◽  
Current Voltage ◽  
Cds Thin Films

In this paper, p-CuO/n-CdS heterojunction was prepared by thermal evaporating CdS thin films on CuO 1 mm thick ceramic pellet substrate. The electrical properties of p-CuO/n-CdS heterojunction were investigated by forward current–voltage–temperature (I–V–T) characteristics in the temperature range of 100-300 K. The junction barrier height, ideality factor, and the series resistance values of the diode evaluated by using thermionic emission (TE) theory and Cheung’s method are 0.566 eV, 5.535 and 618.24 Ω at 300 K, respectively. The junction barrier height, ideality factor and series resistance were found to be strong temperature dependence. In part of C-V measurements at room temperature, the obtained built-in potential value being 0.538 V is well consistent with the junction barrier height value evaluated from I-V measurements

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