Low Interface Trap Density HfO2/Al2O3/InAs MOS Capacitors Prepared by Nitrogen Plasma Treatment

2015 ◽  
Author(s):  
G.B. He ◽  
W.J. Hsueh ◽  
C.Y. Chen ◽  
J.I. Chyi
2013 ◽  
Vol 740-742 ◽  
pp. 723-726 ◽  
Author(s):  
Narumasa Soejima ◽  
Taishi Kimura ◽  
Tsuyoshi Ishikawa ◽  
Takahide Sugiyama

We investigated the effects of the post-oxidation annealing (POA) atmosphere on the electrical properties and interfacial roughness of SiO2 deposited on a 4H-SiC (0001) face and SiC. POA in ammonia (NH3) gave MOS capacitors with a lower interface trap density and n-channel MOSFETs with higher field-effect mobility than POA in nitrous oxide (N2O) or nitrogen (N2). In contrast, POA in N2O gave a lower interface trap density than POA in N2, but it gave the lowest field-effect mobility of all the samples. Cross-sectional TEM observations revealed that N2O POA gave a higher interfacial roughness than NH3 POA. We thus considered that N2O POA degraded the inversion-layer mobility due to increased roughness scattering.


2014 ◽  
Vol 806 ◽  
pp. 139-142 ◽  
Author(s):  
Yogesh K. Sharma ◽  
A.C. Ahyi ◽  
Tamara Issacs-Smith ◽  
M.R. Jennings ◽  
S.M. Thomas ◽  
...  

The NO (nitric oxide) passivation process for 4H-SiC MOSFETs (silicon carbide metal-oxide-semiconductor filed effect transistors) effectively reduces the interface trap density and increases the inversion channel mobility from less that 10 to around 35cm2/V.s, only 5% of the bulk mobility. Recent results on the phosphorous passivation of the SiO2/4H-SiC interface have shown that it improves the mobility to about 90 cm2/V.s. Phosphorous passivation converts oxide (SiO2) into phosphosilicate glass (PSG) which is a polar material and results in device instabilities under abias-temperature stress (BTS) measurements. To limit the polarization effect, a new thin PSG process has been developed. The interface trap density of 4H-SiC-MOS capacitors using this process is as low as 3x1011cm-2eV-1. BTS results on MOSFETs have shown that the thin PSG devices are as stable as NO passivated devices with mobility around 80 cm2/V.s.


2014 ◽  
Vol 806 ◽  
pp. 149-152
Author(s):  
Stephen M. Thomas ◽  
M.R. Jennings ◽  
Y.K. Sharma ◽  
C.A. Fisher ◽  
P.A. Mawby

Silicon carbide based devices have the potential to surpass silicon technology in high power, high frequency and high temperature applications. 4H-SiC MOS transistors currently suffer from a low channel mobility due to a high density of traps near the oxide/SiC interface. In this work, oxides have been grown on the Si face of 4H-SiC using oxygen flow rates ranging from 2.5 l/min to 0.05 l/min. Capacitance-voltage measurements on MOS capacitors revealed approximately a fourfold reduction in the interface trap density and a 25% increase in oxide thickness by reducing the flow rate from 2.5 l/min to 0.05 l/min.


2011 ◽  
Vol 57 (1) ◽  
pp. 76-79 ◽  
Author(s):  
Xingguang Zhu ◽  
Ayayi C. Ahyi ◽  
Mingyu Li ◽  
Zengjun Chen ◽  
John Rozen ◽  
...  

2012 ◽  
Vol 177 (15) ◽  
pp. 1327-1330 ◽  
Author(s):  
T. Gutt ◽  
T. Małachowski ◽  
H.M. Przewłocki ◽  
O. Engström ◽  
M. Bakowski ◽  
...  

2016 ◽  
Vol 858 ◽  
pp. 647-650
Author(s):  
Zhao Yang Peng ◽  
Yi Yu Wang ◽  
Hua Jun Shen ◽  
Yun Bai ◽  
Yi Dan Tang ◽  
...  

Effects of NO and forming gas annealing treatment on the interface quality and reliability of 4H-SiC MOS were systematically studied by low temperature conductance measurements in combination with time-zero dielectric breakdown and time-dependent dielectric breakdown methods. The interface trap density (Dit) showed no obvious reduction after forming gas annealing, and the values of Dit decreased significantly after combined NO and forming gas annealing treatment. The F-N barrier height, electric field to breakdown (Ebd) and charge to breakdown (Qbd) of the MOS structure increased from 2.42 eV, 10 MV/cm, 1mC/cm2 to 2.62 eV, 10.7 MV/cm, 78mC/cm2 after forming gas annealing. The values of F-N barrier height, Ebd and Qbd for MOS capacitors with combined NO and forming gas annealing treatment are 2.69 eV, 10.2 MV/cm, and 24mC/cm2. These results suggest that forming gas annealing is more effective in reliability improvement. While when considering the interface trap density, it seems that combined NO and forming gas annealing treatment is a better choice.


2012 ◽  
Vol 717-720 ◽  
pp. 743-746 ◽  
Author(s):  
Yogesh K. Sharma ◽  
Ayayi Claude Ahyi ◽  
Tamara Issacs-Smith ◽  
Xiao Shen ◽  
Sokrates T. Pantelides ◽  
...  

Phosphorous passivation of the SiO2/4H-SiC interface lowers the interface trap density and increases the field effect mobility for n-channel MOSFETs to twice the value of 30-40cm2/V-s obtained using standard NO nitridation. Passivation using P2O5 introduced with an SiP2O7 planar diffusion source (PDS) converts the oxide layer to phosphosilicate glass (PSG) which is a polar material. BTS (bias‐temperature‐stress) measurements with MOS capacitors and FETs show that the benefits of reduced interface trap density and increased mobility are offset by unstable flat band and threshold voltages. This instability can be removed by etching away the PSG oxide and depositing a replacement SiO2 layer. However, trap densities for etched MOS capacitors are "NO-like" (i.e., higher), which would lead one to expect a lower mobility if MOSFETs are fabricated with the PSG / etch / deposited oxide process.


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