Interface Trap Density Reduction and Oxide Profiling for Mos Capacitors with Fluorinated Gate Oxide Dielectrics

1993 ◽  
pp. 345-352
Author(s):  
Dimitrios N. Kouvatsos ◽  
Ralph J. Jaccodine ◽  
Fred A. Stevie
Keyword(s):  
Gate Oxide ◽  
Trap Density ◽  
Interface Trap Density ◽  
Interface Trap ◽  
Mos Capacitors ◽  
Density Reduction

Analysis of the Electron Traps at the 4H-SiC/SiO2 Interface of a Gate Oxide Obtained by Wet Oxidation of a Nitrogen Pre-Implanted Layer

2009 ◽  
Vol 615-617 ◽  
pp. 533-536
Author(s):  
Ioana Pintilie ◽  
Francesco Moscatelli ◽  
Roberta Nipoti ◽  
Antonella Poggi ◽  
Sandro Solmi ◽  
...  
Keyword(s):  
Low Frequency ◽  
Gate Oxide ◽  
High Accuracy ◽  
Interface Trap Density ◽  
Interface Trap ◽  
High Concentration ◽  
Mos Capacitors ◽  
Order Of Magnitude ◽  
Good Agreement

This work is focusing on the effect of a high concentration of nitrogen (N) introduced by ion implantation at the SiO2/4H-SiC interface in MOS capacitors. The N implanted sample (Ninterface ~1x1019cm-3) is compared with a non-implanted one (Ninterface ~1x1016cm-3) by means of the electron interface trap density (Dit). The Dit is determined via High-Low frequency C-V method and Thermal Dielectric Relaxation Current (TDRC) technique. It is shown that the TDRC method, mainly used so far for determination of near interface oxide charges, can be exploited to gain information about the Dit too. The determined value of Dit in the N-implanted sample is nearly one order of magnitude lower than that in the sample without N implantation. Good agreement between the TDRC results and those obtained from High-Low frequency C-V measurements is obtained. Furthermore, the TDRC method shows a high accuracy and resolution of Dit evaluation in the region close to the majority carrier band edge and gives information about the traps located into the oxide.

Electrical Characterization of GaN Metal Oxide Semiconductor Diode using Sc2O3 as the Gate Oxide

2001 ◽  
Vol 693 ◽  
Author(s):  
R. Mehandru ◽  
B.P. Gila ◽  
J. Kim ◽  
J.W. Johnson ◽  
K.P. Lee ◽  
...  
Keyword(s):  
Metal Oxide ◽  
Inductively Coupled Plasma ◽  
Electron Cyclotron Resonance ◽  
Gate Oxide ◽  
Metal Oxide Semiconductor ◽  
Trap Density ◽  
Oxide Semiconductor ◽  
Semiconductor Diode ◽  
Interface Trap Density ◽  
Interface Trap

AbstractGaN metal oxide semiconductor diodes were demonstrated utilizing Sc2O3 as the gate oxide. Sc2O3 was grown at 100°C on MOCVD grown n-GaN layers in a molecular beam epitaxy (MBE) system, using a scandium elemental source and an Electron Cyclotron Resonance (ECR) oxygen plasma. Ar/Cl2 based discharges was used to remove Sc2O3, in order to expose the underlying n-GaN for ohmic metal deposition in an Inductively Coupled Plasma system. Electron beam deposited Ti/Al/Pt/Au and Pt/Au were utilized as ohmic and gate metallizations, respectively. An interface trap density of 5 × 1011 eV-1cm-2was obtained with the Terman method. Conductance-voltage measurements were also used to estimate the interface trap density and a slightly higher number was obtained as compared to the Terman method. Results of capacitance measurements at elevated temperature (up to 300°C) indicated the presence of deep states near the interface.

Effect of NH3 Post-Oxidation Annealing on Flatness of SiO2/SiC Interface

2013 ◽  
Vol 740-742 ◽  
pp. 723-726 ◽  
Author(s):  
Narumasa Soejima ◽  
Taishi Kimura ◽  
Tsuyoshi Ishikawa ◽  
Takahide Sugiyama
Keyword(s):  
Nitrous Oxide ◽  
Field Effect ◽  
Inversion Layer ◽  
Trap Density ◽  
Interface Trap Density ◽  
Interface Trap ◽  
Field Effect Mobility ◽  
Interfacial Roughness ◽  
Cross Sectional ◽  
Mos Capacitors

We investigated the effects of the post-oxidation annealing (POA) atmosphere on the electrical properties and interfacial roughness of SiO2 deposited on a 4H-SiC (0001) face and SiC. POA in ammonia (NH3) gave MOS capacitors with a lower interface trap density and n-channel MOSFETs with higher field-effect mobility than POA in nitrous oxide (N2O) or nitrogen (N2). In contrast, POA in N2O gave a lower interface trap density than POA in N2, but it gave the lowest field-effect mobility of all the samples. Cross-sectional TEM observations revealed that N2O POA gave a higher interfacial roughness than NH3 POA. We thus considered that N2O POA degraded the inversion-layer mobility due to increased roughness scattering.

Stable Phosphorus Passivated SiO2/4H-SiC Interface Using Thin Oxides

2014 ◽  
Vol 806 ◽  
pp. 139-142 ◽  
Author(s):  
Yogesh K. Sharma ◽  
A.C. Ahyi ◽  
Tamara Issacs-Smith ◽  
M.R. Jennings ◽  
S.M. Thomas ◽  
...  
Keyword(s):  
Metal Oxide Semiconductor ◽  
Trap Density ◽  
Oxide Semiconductor ◽  
Interface Trap Density ◽  
Interface Trap ◽  
Polar Material ◽  
Mos Capacitors ◽  
Channel Mobility ◽  
Inversion Channel ◽  
Phosphosilicate Glass

The NO (nitric oxide) passivation process for 4H-SiC MOSFETs (silicon carbide metal-oxide-semiconductor filed effect transistors) effectively reduces the interface trap density and increases the inversion channel mobility from less that 10 to around 35cm2/V.s, only 5% of the bulk mobility. Recent results on the phosphorous passivation of the SiO2/4H-SiC interface have shown that it improves the mobility to about 90 cm2/V.s. Phosphorous passivation converts oxide (SiO2) into phosphosilicate glass (PSG) which is a polar material and results in device instabilities under abias-temperature stress (BTS) measurements. To limit the polarization effect, a new thin PSG process has been developed. The interface trap density of 4H-SiC-MOS capacitors using this process is as low as 3x1011cm-2eV-1. BTS results on MOSFETs have shown that the thin PSG devices are as stable as NO passivated devices with mobility around 80 cm2/V.s.

Improved 4H-SiC MOS Interface Produced by Oxidized-SiN Gate Oxide

2010 ◽  
Vol 645-648 ◽  
pp. 511-514 ◽  
Author(s):  
Jeong Hyun Moon ◽  
Jeong Hyuk Yim ◽  
Han Seok Seo ◽  
Chang Hyun Kim ◽  
Do Hyun Lee ◽  
...  
Keyword(s):  
Physical Properties ◽  
Gate Oxide ◽  
Trap Density ◽  
Interface Trap Density ◽  
Interface Trap

We have investigated the electrical and physical properties of the oxidized-SiN with or without post oxidation annealing (POA) in N2 gas. A significant reduction in interface-trap density (Dit) has been observed in the oxidized-SiN with N2 POA for 60 min if compared with other oxides. The reason for this has been explained in this paper.

The Impact of Oxygen Flow Rate on the Oxide Thickness and Interface Trap Density in 4H-SiC MOS Capacitors

2014 ◽  
Vol 806 ◽  
pp. 149-152
Author(s):  
Stephen M. Thomas ◽  
M.R. Jennings ◽  
Y.K. Sharma ◽  
C.A. Fisher ◽  
P.A. Mawby
Keyword(s):  
Flow Rate ◽  
Oxide Thickness ◽  
Trap Density ◽  
Oxygen Flow ◽  
Interface Trap Density ◽  
Interface Trap ◽  
Mos Transistors ◽  
Mos Capacitors ◽  
Channel Mobility ◽  
The Impact

Silicon carbide based devices have the potential to surpass silicon technology in high power, high frequency and high temperature applications. 4H-SiC MOS transistors currently suffer from a low channel mobility due to a high density of traps near the oxide/SiC interface. In this work, oxides have been grown on the Si face of 4H-SiC using oxygen flow rates ranging from 2.5 l/min to 0.05 l/min. Capacitance-voltage measurements on MOS capacitors revealed approximately a fourfold reduction in the interface trap density and a 25% increase in oxide thickness by reducing the flow rate from 2.5 l/min to 0.05 l/min.

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