60 GHz Double Deck T-Gate AlN/GaN/AlGaN HEMT for V-Band Satellites

The influence of double deck T-gate on LG=0.2 μm AlN/GaN/AlGaN HEMT is analysed in this paper. The T-gate supported with Silicon Nitride provides a tremendous mechanical reliability. It drops off the crest electric-field at gate edges and postponing the breakdown voltage of a device. A 0.2-μm double deck T-gate HEMT on Silicon Carbide substrate offer fMAX of 107 Giga Hertz, fT of 60 Giga Hertz and the breakdown voltage of 136 Volts. Furthermore, it produces the maximum-transconductance and drain-current of 0.187 Siemens/mm and 0.41 Ampere/mm respectively. In addition, the lateral electric-field noticed at gate-edge shows 2.1×106 Volts/cm. Besides, the double deck T-gate AlN/GaN HEMT achieves a 45 % increment in breakdown voltage compared to traditional GaN-HEMT device. Moreover, it reveals a remarkable Johnson figure-of-merit of 7.9 Tera Hertz Volt. Therefore, the double deck T-gate on AlN/GaN/AlGaN HEMT is the superlative device for 60 GHz V-band satellite application.

A Study on Physically Based Maximum Electric Field Modeling Used for HCI Induced Degradation Characteristic of LDMOS

This paper describes a physically based maximum electric field model of laterally diffused MOSFET (LDMOS) transistors under the condition of high current injection effect used for reliability and aging simulations. LDMOSFETs work under high-voltage and large-current biases, where electric field increases with the biases at the gate edge. We present formulations, implementations into SPICE simulators and measurement verifications of our physically based maximum electric field model.

Analysis Self-Healing of Gate Leakage Current due to Oxide Traps to Improve Reliability of Gate Electrode

To achieve robust SiC-MOSFET, reliability of the gate insulator was investigated in terms of gate electrode edge treatment. Analytical calculation showed that r should be larger than the thickness of gate insulator to relax the electric field concentration. We obtained the rounded gate edge by dry oxidation at 1000°C, while oxidation at 800°C had it sharpened. Former samples exhibited low leakage current with Time-Zero-Dielectric-Breakdown (TZDB) measurement. Ig consisted of Fowler-Nordheim (FN) tunneling current for Vg > 0, and it includes excess components for Vg < 0. We confirmed that they occurred at the gate edge and that they coursed positively charged trap centers in oxide near poly-Si/SiO2 interface which caused local barrier lowering. Electron injection removed them by tunneling/recombination process, which followed tunneling-front model.