Finite-Horizon H-Infinity Control for Time-Varying State-Saturated Systems under Stochastic Communication Protocol

In this paper, the H∞ control problem is investigated for a class of time-varying state-saturated systems with both stochastic parameters and nonlinearities under the stochastic communication protocol (SCP). The sensor-to-controller network is considered where only one sensor can obtain access to the communication network at each transmission instant. The SCP is adopted to mitigate the undesirable data collision phenomenon. The model transformation technique is employed to simplify the addressed problem, and then, the completing squares method is carried out to obtain a sufficient condition for the existence of the finite-horizon H∞ controller. The controller parameters are characterized by solving two coupled backward recursive Riccati-like difference equations. A simulation example is finally utilized to illustrate the effectiveness of the proposed controller design scheme.

Algorithmic TCAM on FPGA with data collision approach

<span>Content addressable memory (CAM) and ternary content addressable memory (TCAM) are specialized high-speed memories for data searching. CAM and TCAM have many applications in network routing, packet forwarding and Internet data centers. These types of memories have drawbacks on power dissipation and area. As field-programmable gate array (FPGA) is recently being used for network acceleration applications, the demand to integrate TCAM and CAM on FPGA is increasing. Because most FPGAs do not support native TCAM and CAM hardware, methods of implementing algorithmic TCAM using FPGA resources have been proposed through recent years. Algorithmic TCAM on FPGA have the advantages of FPGAs low power consumption and high intergration scalability. This paper proposes a scaleable algorithmic TCAM design on FPGA. The design uses memory blocks to negate power dissipation issue and data collision to save area. The paper also presents a design of a 256 x 104-bit algorithmic TCAM on Intel FPGA Cyclone V, evaluates the performance and application ability of the design on large scale and in future developments.</span>

Design of Intelligent Drop Fuse

This paper introduces the design of an intelligent drop fuse. This study analyzes the system composition of intelligent drop fuse, and introduces the hardware and software design principle, architecture and implementation method of intelligent drop fuse. This design mainly applies the intelligent fuse terminal in the station area, which is used to monitor the position signal of the drop fuse in real time, report the fuse drop state information, and effectively shorten the fault location and troubleshooting time, so as to reduce complaints and provide services. The wireless communication module implements a weighted random back-off transmission algorithm, which can determine the transmission time and priority of data according to the urgency of data in the process of data transmission, avoid data collision and ensure the arrival of data as much as possible. Doi: 10.28991/HEF-2020-01-03-04 Full Text: PDF

Optimization of Big Data Scheduling in Social Networks

In social network big data scheduling, it is easy for target data to conflict in the same data node. Of the different kinds of entropy measures, this paper focuses on the optimization of target entropy. Therefore, this paper presents an optimized method for the scheduling of big data in social networks and also takes into account each task’s amount of data communication during target data transmission to construct a big data scheduling model. Firstly, the task scheduling model is constructed to solve the problem of conflicting target data in the same data node. Next, the necessary conditions for the scheduling of tasks are analyzed. Then, the a periodic task distribution function is calculated. Finally, tasks are scheduled based on the minimum product of the corresponding resource level and the minimum execution time of each task is calculated. Experimental results show that our optimized scheduling model quickly optimizes the scheduling of social network data and solves the problem of strong data collision.

Arsitektur Jaringan Komputer Berbasis Framework Togaf-Adm Menggunakan Proses NDLC

One factor for the achievement of the objectives of the concept of learning in the management of modern education is to utilize information technology that is supported by a reliable computer network architecture. In this research, the method of designing a computer network architecture is based on the 4 stages of the TOGAF-ADM Framework, namely vision architecture, business architecture, information systems architecture (data architecture and application architecture) and technology architecture. Then the system implementation uses the Network Development Life Cycle (NDLC) process which consists of analysis, design, simulation prototyping, implementation, monitoring, management and ending with an evaluation of computer network development. From the trial results, it is obtained that by using load balance technology and microtic device support, sending and receiving data packets is now faster and more stable because the communication lines have been segmented and the data collision in the network is resolved. The new network implementation successfully stabilized upload and download data speeds, overcoming limited connections and 0% packet loss.

PERANCANGAN SIMULASI MEDIA PEMBELAJARAN DENGAN METODE DIVISION REMAINDER UNTUK PENCARIAN ALAMAT RELATIF PADA PROSES PENEMPATAN DATA

Learning media is one medium that can help students understand the subject matter. No file system in the course material on how to put the data in a table. The material is the use of hashing technique in the search for the relative address of the data. In applying the hash function to find the relative address is probable some data have the same hash function results. This causes a collision (collision) at the time of placement data. Collision (collision) can be addressed by using multiple strategies, among others, Resolution Linear (Linear Resolution), and Double Hashing Overflow. The design of this simulation was organized which begins with the concept, design, material collecting, and assembly. At the design stage is divided into four stages, namely stages of the application process flowchart design, design app menu hierarchy, the design of the main menu display and design process flow aplikasi.Aplikasi calculation aims to assist lecturers in teaching so that students can easily understand and comprehend the material on the hash function particularly the division remainder method to find the relative address.

Deep-learning-based phase control method for tiled aperture coherent beam combining systems

We incorporate deep learning (DL) into tiled aperture coherent beam combining (CBC) systems for the first time, to the best of our knowledge. By using a well-trained convolutional neural network DL model, which has been constructed at a non-focal-plane to avoid the data collision problem, the relative phase of each beamlet could be accurately estimated, and then the phase error in the CBC system could be compensated directly by a servo phase control system. The feasibility and extensibility of the phase control method have been demonstrated by simulating the coherent combining of different hexagonal arrays. This DL-based phase control method offers a new way of eliminating dynamic phase noise in tiled aperture CBC systems, and it could provide a valuable reference on alleviating the long-standing problem that the phase control bandwidth decreases as the number of array elements increases.

Perancangan Switch Manageable Untuk Pengelolaan Virtual LAN Menggunakan Linux CentOS Pada SMKN 2 Kuripan

In realizing an integrated service both internally and externally, SMK Negeri 2 Kuripan need a reliable computer network infrastructure and can connect all units in a single integrated network. Current state of computer networks in SMK Negeri 2 Kuripan is still a large computer networks and complex. With the computer network conditions like this, it causes traffic in computer networks become dense eventually cause some problems such as access to an application to be slow. Under these conditions, then the computer network in SMK Negeri 2 Kuripan requires a segmentation of the network / subnetwork according to the needs of the organization. Computer networks in SMK Negeri 2 Kuripan is still using a single network ID, so as to make the segmentation of networks of smaller needed a way to break the single Network ID into a Network ID. Subnetting is a way to break up the Network ID is by using hostid bits to form part subnetID. Subnetting process is done on a single Network ID is produced 11 subnet that has been established based on the needs of organizations SMK Negeri 2 Kuripan. Utilization of Virtual LAN topologies for the physical design and subnetting for logic design is able to provide optimization of the performance of computer networks. Optimization is achieved due to the use of VLAN network can reduce the collision data (collision) by blocking packets / frames that do not need to be outstanding in the network. In addition, VLANs can also be split in / out broadcast domain, so that data packets sent from a host will only be forwarded to the destination host and other hosts will not accept packets / frames.