vertical probe
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2021 ◽  
Vol 21 (5) ◽  
pp. 2949-2958
Author(s):  
Xuan Luc Le ◽  
Han Eul Lee ◽  
Sung-Hoon Choa

Recently, fine pitch wafer level packaging (WLP) technologies have drawn a great attention in the semiconductor industries. WLP technology uses various interconnection structures including microbumps and through-silicon-vias (TSVs). To increase yield and reduce cost, there is an increasing demand for wafer level testing. Contact behavior between probe and interconnection structure is a very important factor affecting the reliability and performance of wafer testing. In this study, with a MEMS vertical probe, we performed systematic numerical analysis of the deformation behavior of various interconnection structures, including solder bump, copper (Cu) pillar bump, solder capper Cu bump, and TSV. During probing, the solder ball showed the largest deformation. The Cu pillar bump also exhibited relatively large deformation. The Cu bump began to deform at OD of 10 μm. At OD of 20 μm, bump pillar was compressed, and the height of the bump decreased by 8.3%. The deformation behavior of the solder capped Cu bump was similar to that of the solder ball. At OD of 20 μm, the solder and Cu bumps were largely deformed, and the total height was reduced by 11%. The TSV structure showed the lowest deformation, but exerted the largest stress on the probe. In particular, copper protrusion at the outer edge of the via was observed, and very large shear stress was generated between the via and the silicon oxide layer. In summary, when probing various interconnection structures, the probe stress is less than that when using an aluminum pad. On the other hand, deformation of the structure is a critical issue. In order to minimize damage to the interconnection structure, smaller size probes or less overdrive should be used. This study will provide important guidelines for performing wafer-level testing and minimizing damage of probes and interconnection structures.



Crystals ◽  
2021 ◽  
Vol 11 (5) ◽  
pp. 485
Author(s):  
Xuan Luc Le ◽  
Sung-Hoon Choa

As fine-pitch 3D wafer-level packaging becomes more popular in semiconductor industries, wafer-level prebond testing of various interconnect structures has become increasingly challenging. Additionally, improving the current-carrying capacity (CCC) and minimizing damage to the probe and micro-interconnect structures are very important issues in wafer-level testing. In this study, we propose an Au–NiCo MEMS vertical probe with an enhanced CCC to efficiently reduce the damage to the probe and various interconnect structures, including a solder ball, Cu pillar microbump, and TSV. The Au–NiCo probe has an Au layer inside the NiCo and an Au layer outside the surface of the NiCo probe to reduce resistivity and contact stress. The current-carrying capacity, contact stress, and deformation behavior of the probe and various interconnect structures were evaluated using numerical analyses. The Au–NiCo probe had a 150% higher CCC than the conventional NiCo probe. The maximum allowable current capacity of the 5000 µm-long Au–NiCo probe was 750 mA. The Au–NiCo probe exhibited less contact force and stress than the NiCo probe. The Au–NiCo probe also produced less deformation of various interconnect structures. These results indicate that the proposed Au–NiCo probe will be a prospective candidate for advanced wafer-level testing, with better probing efficiency and higher test yield and reliability than the conventional vertical probe.



2020 ◽  
Vol 77 (10) ◽  
pp. 829-835
Author(s):  
Won-Sik Son ◽  
Ho-Young Lee ◽  
Sung-Han Rhim


2020 ◽  
Vol 62 (1) ◽  
pp. 191-205
Author(s):  
Lantao Huang ◽  
Jiahao Zou ◽  
Jing Zhang ◽  
Yihan Zhou ◽  
Fangxiong Deng




2017 ◽  
Vol 88 (12) ◽  
pp. 123111
Author(s):  
V. Protopopov
Keyword(s):  


2017 ◽  
Vol 41 (2) ◽  
pp. 313-326
Author(s):  
Te-Ching Hsiao ◽  
Shyh-Chour Huang ◽  
Hao-Yuan Chang

The purpose of this paper is mainly to develop a method to use the Taguchi method with the L18 (21 × 37) orthogonal array to obtain an optimal geometrical design of the vertical probing needle and base on various criteria to minimize the stress on the probing needle during wafer-level probing test. Furthermore, importance of the factors on the probing mark area ratio was also ranked. The results shows that as probe length, offset, and lower die gap increase, stress on the probing decrease. On the contrary, vertical probe bends decrease, stress on the probe increase. Furthermore, the body of vertical probe with rectangle cross-section is better than square and circular sharp.



2015 ◽  
Vol 16 (12) ◽  
pp. 2509-2515
Author(s):  
Bonghun Shin ◽  
Hyock-Ju Kwon ◽  
Sang-Wook Han ◽  
Chang Min Im


2014 ◽  
Vol 15 (11) ◽  
pp. 2335-2342 ◽  
Author(s):  
Hyock-Ju Kwon ◽  
Jiwon Lee ◽  
Bonghun Shin ◽  
Soo Jeon ◽  
Chung Su Han ◽  
...  


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