In0.53Ga0.47As MOSFETs with high channel mobility and gate stack quality fabricated on 300 mm Si substrate

Author(s):  
M. L. Huang ◽  
S. W. Chang ◽  
M. K. Chen ◽  
C. H. Fan ◽  
H. T. Lin ◽  
...  
2008 ◽  
Vol 93 (16) ◽  
pp. 161913 ◽  
Author(s):  
J. G. Wang ◽  
Jiyoung Kim ◽  
Chang Yong Kang ◽  
Byoung Hun Lee ◽  
Raj Jammy ◽  
...  

2004 ◽  
Vol 84 (12) ◽  
pp. 2148-2150 ◽  
Author(s):  
Chang Yong Kang ◽  
Hag-Ju Cho ◽  
Rino Choi ◽  
Chang Seok Kang ◽  
Young Hee Kim ◽  
...  

2006 ◽  
Vol 53 (4) ◽  
pp. 923-925 ◽  
Author(s):  
M. Yamaguchi ◽  
T. Sakoda ◽  
H. Minakata ◽  
Shiqin Xiao ◽  
Y. Morisaki ◽  
...  

2018 ◽  
Vol 924 ◽  
pp. 494-497 ◽  
Author(s):  
Jesus Urresti ◽  
Faiz Arith ◽  
Konstantin Vassilevski ◽  
Amit Kumar Tiwari ◽  
Sarah Olsen ◽  
...  

We report the development of a low-temperature (600 °C) gate oxidation approach to minimize the density of interface traps (DIT) at the SiC/SiO2interface, ultimately leading to a significantly higher channel mobility in SiC MOSFETs of 81 cm2·V-1·s-1, >11x higher than devices fabricated alongside but with a conventional 1150 °C gate oxide. We further report on the comparison made between the DITand channel mobilities of MOS capacitors and n-MOSFETs fabricated using the low-and high-temperature gate oxidation.


Author(s):  
F.-R. Chen ◽  
T. L. Lee ◽  
L. J. Chen

YSi2-x thin films were grown by depositing the yttrium metal thin films on (111)Si substrate followed by a rapid thermal annealing (RTA) at 450 to 1100°C. The x value of the YSi2-x films ranges from 0 to 0.3. The (0001) plane of the YSi2-x films have an ideal zero lattice mismatch relative to (111)Si surface lattice. The YSi2 has the hexagonal AlB2 crystal structure. The orientation relationship with Si was determined from the diffraction pattern shown in figure 1(a) to be and . The diffraction pattern in figure 1(a) was taken from a specimen annealed at 500°C for 15 second. As the annealing temperature was increased to 600°C, superlattice diffraction spots appear at position as seen in figure 1(b) which may be due to vacancy ordering in the YSi2-x films. The ordered vacancies in YSi2-x form a mesh in Si plane suggested by a LEED experiment.


Author(s):  
V. Kaushik ◽  
P. Maniar ◽  
J. Olowolafe ◽  
R. Jones ◽  
A. Campbell ◽  
...  

Lead zirconium titanate films (Pb (Zr,Ti) O3 or PZT) are being considered for potential application as dielectric films in memory technology due to their high dielectric constants. PZT is a ferroelectric material which shows spontaneous polarizability, reversible under applied electric fields. We report herein some results of TEM studies on thin film capacitor structures containing PZT films with platinum-titanium electrodes.The wafers had a stacked structure consisting of PZT/Pt/Ti/SiO2/Si substrate as shown in Figure 1. Platinum acts as electrode material and titanium is used to overcome the problem of platinum adhesion to the oxide layer. The PZT (0/20/80) films were deposited using a sol-gel method and the structure was annealed at 650°C and 800°C for 30 min in an oxygen ambient. XTEM imaging was done at 200KV with the electron beam parallel to <110> zone axis of silicon.Figure 2 shows the PZT and Pt layers only, since the structure had a tendency to peel off at the Ti-Pt interface during TEM sample preparation.


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