New low-dielectric-constant interlevel dielectrics are being investigated as alternatives to SiO2 for future integrated circuits. In general, these materials have very different mechanical properties from SiO2. In the standard model, electromigration-induced stress evolution caused by changes in the number of available lattice sites in interconnects is described by an effective elastic modulus, B. Finite element calculations were carried out to obtain B as a function of differences in the modulus, E, of interlevel dielectrics, for several stress-free homogeneous dilational strain configurations, for several line aspect ratios, and for different metallization schemes. In contradiction to earlier models, we found that for Cu-based metallization schemes with liners, a decrease in E by nearly two orders of magnitude has a relatively small effect on B, changing it by less than a factor of 2. However, B, and therefore the reliability of Cu interconnects, can be strongly dependent on the modulus and thickness of the liner material.
Low-Damage Reactive Ion Etching of Nanoplasmonic Waveguides with Ultrathin Noble Metal Films