Measurement of the Large-Signal Propagation Delay of Single Transistors

2021 ◽  
pp. 103-126
Author(s):  
Keith A. Jenkins
Keyword(s):  
Signal Propagation ◽  
Propagation Delay ◽  
Large Signal

scholarly journals DPFFs:C2MOSDirect Path Flip-Flops for Process-Resilient Ultradynamic Voltage Scaling

2016 ◽  
Vol 2016 ◽  
pp. 1-10
Author(s):  
Myeong-Eun Hwang ◽  
Sungoh Kwon
Keyword(s):  
Load Condition ◽  
Signal Propagation ◽  
Propagation Delay ◽  
Propagation Path ◽  
Direct Connection ◽  
Standard Cell ◽  
Direct Path ◽  
Output Load ◽  
Adaptive Body Bias ◽  
Signal Propagation Path

We propose two master-slave flip-flops (FFs) that utilize the clocked CMOS (C2MOS) technique with an internal direct connection along the main signal propagation path between the master and slave latches and adopt an adaptive body bias technique to improve circuit robustness.C2MOSstructure improves the setup margin and robustness while providing full compatibility with the standard cell characterization flow. Further, the direct path shortens the logic depth and thus speeds up signal propagation, which can be optimized for less power and smaller area. Measurements from test circuits fabricated in 130 nm technology show that the proposed FF operates down to 60 mV, consuming 24.7 pW while improving the propagation delay, dynamic power, and leakage by 22%, 9%, and 13%, respectively, compared with conventional FFs at the iso-output-load condition. The proposed FFs are integrated into an8×8FIR filter which successfully operates all the way down to 85 mV.

scholarly journals A 10-Year Comparison of Water Levels Measured with a Geodetic GPS Receiver versus a Conventional Tide Gauge

2017 ◽  
Vol 34 (2) ◽  
pp. 295-307 ◽  
Author(s):  
Kristine M. Larson ◽  
Richard D. Ray ◽  
Simon D. P. Williams
Keyword(s):  
Tide Gauge ◽  
Signal Propagation ◽  
Propagation Delay ◽  
Terrestrial Reference Frame ◽  
Water Levels ◽  
Sea Surface ◽  
Ocean Tide ◽  
Gps Receiver ◽  
Tide Gauge Data ◽  
Gauge Data

AbstractA standard geodetic GPS receiver and a conventional Aquatrak tide gauge, collocated at Friday Harbor, Washington, are used to assess the quality of 10 years of water levels estimated from GPS sea surface reflections. The GPS results are improved by accounting for (tidal) motion of the reflecting sea surface and for signal propagation delay by the troposphere. The RMS error of individual GPS water level estimates is about 12 cm. Lower water levels are measured slightly more accurately than higher water levels. Forming daily mean sea levels reduces the RMS difference with the tide gauge data to approximately 2 cm. For monthly means, the RMS difference is 1.3 cm. The GPS elevations, of course, can be automatically placed into a well-defined terrestrial reference frame. Ocean tide coefficients, determined from both the GPS and tide gauge data, are in good agreement, with absolute differences below 1 cm for all constituents save K1 and S1. The latter constituent is especially anomalous, probably owing to daily temperature-induced errors in the Aquatrak tide gauge.

A LOW POWER AND VARIATION-INSENSITIVE CURRENT-MODE SIGNALING SCHEME

2013 ◽  
Vol 22 (08) ◽  
pp. 1350068
Author(s):  
XINSHENG WANG ◽  
YIZHE HU ◽  
LIANG HAN ◽  
JINGHU LI ◽  
CHENXU WANG ◽  
...  
Keyword(s):  
Low Power ◽  
High Speed ◽  
Current Mode ◽  
Signal Propagation ◽  
Cmos Technology ◽  
Propagation Delay ◽  
Noise Performance ◽  
On Chip ◽  
Variation Tolerance ◽  
Driving Signal

Process and supply variations all have a large influence on current-mode signaling (CMS) circuits, limiting their application on the fields of high-speed low power communication over long on-chip interconnects. A variation-insensitive CMS scheme (CMS-Bias) was offered, employing a particular bias circuit to compensate the effects of variations, and was robust enough against inter-die and intra-die variations. In this paper, we studied in detail the principle of variation tolerance of the CMS circuit and proposed a more suitable bias circuit for it. The CMS-Bias with the proposed bias circuit (CMS-Proposed) can acquire the same variation tolerance but consume less energy, compared with CMS-Bias with the original bias circuit (CMS-Original). Both the CMS schemes were fabricated in 180 nm CMOS technology. Simulation and measured results indicate that the two CMS interconnect circuits have the similar signal propagation delay when driving signal over a 10 mm line, but the CMS-Proposed offers about 9% reduction in energy/bit and 7.2% reduction in energy-delay-product (EDP) over the CMS-Original. Simulation results show that the two CMS schemes only change about 5% in delay when suffering intra-die variations, and have the same robustness against inter-die variations. Both simulation and measurements all show that the proposed bias circuits, employing self-biasing structure, contribute to robustness against supply variations to some extent. Jitter analysis presents the two CMS schemes have the same noise performance.

Electrical Extraction of The in-Plane Dielectric Constant of Fluorinated Polyimide

1997 ◽  
Vol 476 ◽  
Author(s):  
Alvin L.S. Loke ◽  
Jeffrey T. Wetzel ◽  
John J. Stankus ◽  
S. Simon Wong
Keyword(s):  
Dielectric Constant ◽  
Electric Fields ◽  
Signal Propagation ◽  
Propagation Delay ◽  
Dielectric Constants ◽  
Effective Dielectric Constant ◽  
Fluorinated Polyimide ◽  
Lower Dielectric Constant ◽  
Out Of Plane ◽  
Fringing Fields

AbstractFluorinated polyimide can potentially replace TEOS as an interlevel dielectric in future ULSI interconnect technologies because its lower dielectric constant offers reduced crosstalk, signal propagation delay, and dynamic power dissipation. One issue associated with polyimides is the anisotropy in dielectric constant, where the smaller out-of-plane dielectric constant, typically measured using parallel-plate capacitors, can misleadingly exaggerate the advantage in reducing crosstalk. In this paper, we present a novel electrical technique to estimate the in-plane dielectric constant of DuPont FPI-136M fluorinated polyimide without requiring dielectric gapfill.A blanket FPI-136M film is deposited over interdigitated inlaid Al(0.5%Cu) structures and the crosstalk capacitance is measured. Identical inlaid structures with air and TEOS passivations are also measured for capacitance calibration. Differences in measured capacitances reflect electric fields fringing in the various passivation dielectrics above the inlaid metal. With the known dielectric constants of air and TEOS, the effective dielectric constant of FPI-136M is interpolated to be 2.8. Interconnect simulations confirm that the effective dielectric constant extraction technique is valid and accurate provided that the passivation layer is sufficiently thick to contain the fringing fields.To estimate the in-plane dielectric constant, we use simulations to determine the combination of in-plane and out-of-plane dielectric constants that is equivalent to the extracted effective dielectric constant. With an out-of-plane dielectric constant of 2.6, the in-plane dielectric constant of FPI-136M is estimated to be 3.0. This technique is applicable to other dieletrics.

Siloxane Polymers as Low Dielectric Materials for Microelectronics

1995 ◽  
Vol 390 ◽  
Author(s):  
C. P. Wong
Keyword(s):  
Dielectric Constant ◽  
Three Dimensional ◽  
Signal Propagation ◽  
Dielectric Materials ◽  
Propagation Delay ◽  
Dimensional Structure ◽  
Low Dielectric Constant ◽  
Interlayer Dielectric ◽  
Low Dielectric ◽  
High Dielectric

ABSTRACTA modem VLSI device is a complicated three-dimensional structure that consists of multilayer metallization conductor lines which are separated with interlayer-dielectrics as insulation. This VLSI technology drives the IC device into sub-micron feature size that operates at ultra-fast speed (in excess of > 100 MHz). Passivation and interlayer dielectric materials are critical to the device performance due to the conductor signal propagation delay of the high dielectric constant of the material. Low dielectric constant materials are the preferred choice of materials for this reasons. These materials, such as Teflon® and siloxanes (silicones), are desirable because of their low dielectric constant (∈1) = 2.0, 2.7, respectively. This paper describes the use of a low dielectric constant siloxane polymer (silicone) as IC devices passivation layer material, its chemistry, material processes and reliability testing.

scholarly journals Optimization of SFQ Logic Gate Considering Dependence of its Signal Propagation Delay on the Bias Voltage

2014 ◽  
Vol 58 ◽  
pp. 216-219
Author(s):  
Mikio Otsubo ◽  
Yuki Yamanashi ◽  
Nobuyuki Yoshikawa
Keyword(s):  
Bias Voltage ◽  
Logic Gate ◽  
Signal Propagation ◽  
Propagation Delay
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