A Novel Approach to Realistic Worst-case Simulations of CMOS Circuits

ESSDERC ’89 ◽  
1989 ◽  
pp. 310-313 ◽  
Author(s):  
M. J. B. Bolt ◽  
J. Engel ◽  
M. Rocchi ◽  
A. van Steenwijk
Keyword(s):  
Cmos Circuits ◽  
Worst Case ◽  
Novel Approach

Static Analysis of Run-Time Inter-Core Interferences for Concurrent Programs in Shared Cache Multicore Architectures

2012 ◽  
Vol 198-199 ◽  
pp. 523-527
Author(s):  
Fang Yuan Chen ◽  
Dong Song Zhang ◽  
Zhi Ying Wang
Keyword(s):  
Multicore Processors ◽  
Mapping Method ◽  
Concurrent Programs ◽  
Multicore Architectures ◽  
Shared Resources ◽  
Worst Case ◽  
Shared Cache ◽  
Address Mapping ◽  
Novel Approach ◽  
Time Systems

Worst-Case Execution Time (WCET) is crucial in real-time systems and is very challenging in multicore processors due to the possible runtime inter-thread interferences caused by shared resources. This paper proposes a novel approach to analyze runtime inter-core interferences for consecutive or inconsecutive concurrent programs. Our approach can reasonably estimate runtime inter-core interferences in shared cache by introducing lifetime and instruction fetching timing relations analysis into address mapping method. Compared with the method based on lifetime alone, our proposed approach efficiently improves the tightness of WCET estimation.

Robust Economic Dispatch of Microgrid With Highly Penetrated Renewables and Energy Storage System

2021 ◽  
pp. 303-323
Author(s):  
Bishwajit Dey ◽  
Biplab Bhattacharyya ◽  
Sharmistha Sharma
Keyword(s):  
Transaction Costs ◽  
Renewable Energy Sources ◽  
Storage System ◽  
Economic Dispatch ◽  
Wind Farms ◽  
Energy Storage System ◽  
Worst Case ◽  
Transaction Prices ◽  
Novel Approach ◽  
Generation Costs

Economic dispatch (ED) of a grid-connected and renewable integrated microgrid is considered in this article. Here, the renewable energy sources (RES) taken into consideration are wind farms. A parameter worst-case-transaction-cost which arises due to the stochastic availability and uncontrollable nature of wind farms is also emphasised and efforts have been taken to minimize it too. Hence, the article focuses on separately optimizing the generation costs and the worst-case transaction costs. It also optimises the net microgrid cost as a whole, which is the summation of generation costs and the worst-case transaction costs. Two different cases with highly varying transaction prices are studied. Various types of loads, ramp rates of generators, charging and discharging limits of the batteries are taken into consideration while minimizing the microgrid cost. Four meta-heuristic soft computing algorithms are applied for optimization and a comparative analysis among them is studied. Numerical results are tabulated to justify the effectiveness of the novel approach.

Robust Economic Dispatch of Microgrid With Highly Penetrated Renewables and Energy Storage System

2022 ◽  
pp. 196-216
Author(s):  
Bishwajit Dey ◽  
Biplab Bhattacharyya ◽  
Sharmistha Sharma
Keyword(s):  
Transaction Costs ◽  
Renewable Energy Sources ◽  
Storage System ◽  
Economic Dispatch ◽  
Wind Farms ◽  
Energy Storage System ◽  
Worst Case ◽  
Transaction Prices ◽  
Novel Approach ◽  
Generation Costs

Economic dispatch (ED) of a grid-connected and renewable integrated microgrid is considered in this article. Here, the renewable energy sources (RES) taken into consideration are wind farms. A parameter worst-case-transaction-cost which arises due to the stochastic availability and uncontrollable nature of wind farms is also emphasised and efforts have been taken to minimize it too. Hence, the article focuses on separately optimizing the generation costs and the worst-case transaction costs. It also optimises the net microgrid cost as a whole, which is the summation of generation costs and the worst-case transaction costs. Two different cases with highly varying transaction prices are studied. Various types of loads, ramp rates of generators, charging and discharging limits of the batteries are taken into consideration while minimizing the microgrid cost. Four meta-heuristic soft computing algorithms are applied for optimization and a comparative analysis among them is studied. Numerical results are tabulated to justify the effectiveness of the novel approach.

Weighted RAIM for APV: The Ideal Protection Level

2010 ◽  
Vol 64 (1) ◽  
pp. 61-73 ◽  
Author(s):  
Carl D. Milner ◽  
Washington Y. Ochieng
Keyword(s):  
Weighted Least Squares ◽  
Failure Detection ◽  
Complex Problem ◽  
International Standards ◽  
Worst Case ◽  
Protection Level ◽  
Novel Approach ◽  
Detection Probabilities ◽  
Receiver Autonomous Integrity Monitoring ◽  
Integrity Risk

International standards require the use of a weighted least-squares approach to onboard Receiver Autonomous Integrity Monitoring (RAIM). However, the protection levels developed to determine if the conditions exist to perform a measurement check (i.e. failure detection) are not specified. Various methods for the computation of protection levels exist. However, they are essentially approximations to the complex problem of computing the worst-case missed detection probability under a weighted system. In this paper, a novel approach to determine this probability at the worst-case measurement bias is presented. The missed detection probabilities are then iteratively solved against the integrity risk requirement in order to derive an optimal protection level for the operation. It is shown that the new method improves availability by more than 30% compared to the baseline weighted RAIM algorithm.A version of this paper was first presented at the US Institute of Navigation (ION) GNSS 2009 Conference in Savannah, Georgia.

scholarly journals Improving Analytical Delay Modelingfor CMOS Inverters

2015 ◽  
Vol 10 (2) ◽  
pp. 123-134
Author(s):  
Felipe S. Marranghello ◽  
André I. Reis ◽  
Renato P. Ribas
Keyword(s):  
Integrated Circuits ◽  
Timing Analysis ◽  
Channel Length ◽  
Delay Model ◽  
Digital Integrated Circuits ◽  
Cmos Inverter ◽  
Worst Case ◽  
Average Value ◽  
Coupling Capacitance ◽  
Novel Approach

Analytical methods for gate delay estimation are very useful to speedup timing analysis of digital integrated circuits. This work presents a novel approach to analytically estimate the CMOS inverter delay. The proposed method considers the influence of input slope, output load and I/O coupling capacitance, as well as relevant effects such as channel length modulation and drain induced barrier lowering. Experimental results are on good agreement with HSPICE simulations, showing significant accuracy improvement compared to published related work. The delay model error has an average value of 3%, and the worst case error is smaller than 10%.

scholarly journals Worst-case Bounds on Power vs. Proportion in Weighted Voting Games with Application to False-name Manipulation

2021 ◽  
Author(s):  
Yotam Gafni ◽  
Ron Lavi ◽  
Moshe Tennenholtz
Keyword(s):  
Power Indices ◽  
Relative Power ◽  
Banzhaf Index ◽  
Weighted Voting ◽  
Worst Case ◽  
Weighted Voting Games ◽  
Voting Games ◽  
Small Constant ◽  
Novel Approach ◽  
Multi Agent

Weighted voting games are applicable to a wide variety of multi-agent settings. They enable the formalization of power indices which quantify the coalitional power of players. We take a novel approach to the study of the power of big vs.~small players in these games. We model small (big) players as having single (multiple) votes. The aggregate relative power of big players is measured w.r.t.~their votes proportion. For this ratio, we show small constant worst-case bounds for the Shapley-Shubik and the Deegan-Packel indices. In sharp contrast, this ratio is unbounded for the Banzhaf index. As an application, we define a false-name strategic normal form game where each big player may split its votes between false identities, and study its various properties. Together our results provide foundations for the implications of players' size, modeled as their ability to split, on their relative power.

Robust Economic Dispatch of Microgrid With Highly Penetrated Renewables and Energy Storage System

2019 ◽  
Vol 8 (1) ◽  
pp. 67-87 ◽  
Author(s):  
Bishwajit Dey ◽  
Biplab Bhattacharyya ◽  
Sharmistha Sharma
Keyword(s):  
Transaction Costs ◽  
Renewable Energy Sources ◽  
Storage System ◽  
Economic Dispatch ◽  
Wind Farms ◽  
Energy Storage System ◽  
Worst Case ◽  
Transaction Prices ◽  
Novel Approach ◽  
Generation Costs

Economic dispatch (ED) of a grid-connected and renewable integrated microgrid is considered in this article. Here, the renewable energy sources (RES) taken into consideration are wind farms. A parameter worst-case-transaction-cost which arises due to the stochastic availability and uncontrollable nature of wind farms is also emphasised and efforts have been taken to minimize it too. Hence, the article focuses on separately optimizing the generation costs and the worst-case transaction costs. It also optimises the net microgrid cost as a whole, which is the summation of generation costs and the worst-case transaction costs. Two different cases with highly varying transaction prices are studied. Various types of loads, ramp rates of generators, charging and discharging limits of the batteries are taken into consideration while minimizing the microgrid cost. Four meta-heuristic soft computing algorithms are applied for optimization and a comparative analysis among them is studied. Numerical results are tabulated to justify the effectiveness of the novel approach.

A Novel Approach of Identifying Silicon Defects Using Passive Voltage Contrast Techniques Leading to Utilization of In-Line SEM Based Voltage Contrast Inspections to Drive Closed Loop Process Optimization and Defect Elimination

2004 ◽  
Author(s):  
R. Fredrickson ◽  
R. Young ◽  
J. Cournoyer ◽  
M. Schmidt
Keyword(s):  
Process Parameters ◽  
Experimental Results ◽  
Worst Case ◽  
Novel Approach ◽  
Single Column ◽  
Voltage Contrast ◽  
Alternative Processes ◽  
Technology Nodes ◽  
Silicon Defects ◽  
Defect Elimination

Abstract The formation of silicon defects in 0.18um and smaller technology nodes has become a challenging device level defect to identify and eliminate. In this paper, we present a new method of passive voltage contrast that was initially used to locate silicon defects, experimental results revealing the key contributors to the formation of these defects, and a method of in-line identification by correlating SEM based in-line defect inspections to end of line SRAM fail bit maps. Silicon defects that form along the edge of an active region connect the source and drain with a low resistance leakage path that are successfully detected at later processing layers using voltage contrast techniques with a SEM based In-line inspection tool as well as after processing by using our method of passive voltage contrast. The systematic nature of this defect produces a consistent SRAM memory fail mode of single column fails. When these silicon defects are present, single column fails dominate the usual single and double bit fail modes. The physical location of the failing columns can be mapped back to the defect locations produced from the in-line inspections. This method was utilized to interpret experimental results in an effort to determine process parameters that produce silicon defects. It was found that STI depth plays a key role in the formation of these defects. Experiments were run where the depth was intentionally put at worst case so that the effectiveness of several alternative processes to repair the defects could be evaluated. It was shown that modulating the STI liner oxidation temperature had the largest effect compared to several other process parameters.

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