Estimating worst-case power consumption of CMOS circuits modeled as symbolic neural networks

Author(s):  
E. Macii ◽  
M. Poncino
2015 ◽  
Vol 25 (03) ◽  
pp. 1640013
Author(s):  
Miroslav Valka ◽  
Alberto Bosio ◽  
Luigi Dilillo ◽  
Patrick Girard ◽  
Arnaud Virazel ◽  
...  

Power gating techniques have been adopted so far to reduce the static power consumption of integrated circuits (ICs). Power gating is usually implemented by means of several power switches (PSs). Manufacturing defects affecting PSs can lead to increase in the actual static power consumption and, in the worst case, they can completely isolate a functional block in the IC. Thus, efficient test and diagnosis solutions are needed. In this paper, we present a novel Design for Test and Diagnosis (DfTD) solution able to increase the test quality and diagnosis accuracy of PSs. The proposed approach has been validated through SPICE simulations on ITC’99 benchmark circuits as well as on industrial test cases.


2003 ◽  
Vol 1 ◽  
pp. 223-228
Author(s):  
C. Schlachta ◽  
M. Glesner

Abstract. One of the possible techniques to reduces the power consumption in digital CMOS circuits is to slow down the charge transport. This slowdown can be achieved by introducing an inductor in the charging path. Additionally, the inductor can act as an energy storage element, conserving the energy that is normally dissipated during discharging. Together with the parasitic capacitances from the circuit a LCresonant circuit is formed.


ESSDERC ’89 ◽  
1989 ◽  
pp. 310-313 ◽  
Author(s):  
M. J. B. Bolt ◽  
J. Engel ◽  
M. Rocchi ◽  
A. van Steenwijk

Sensors ◽  
2019 ◽  
Vol 19 (8) ◽  
pp. 1789 ◽  
Author(s):  
Apostolos Karalis ◽  
Dimitrios Zorbas ◽  
Christos Douligeris

IEEE802.15.4-time slotted channel hopping (TSCH) is a medium access control (MAC) protocol designed to support wireless device networking, offering high reliability and low power consumption, two features that are desirable in the industrial internet of things (IIoT). The formation of an IEEE802.15.4-TSCH network relies on the periodic transmissions of network advertising frames called enhanced beacons (EB). The scheduling of EB transmissions plays a crucial role both in the joining time and in the power consumption of the nodes. The existence of collisions between EB is an important factor that negatively affects the performance. In the worst case, all the neighboring EB transmissions of a node may collide, a phenomenon which we call a full collision. Most of the EB scheduling methods that have been proposed in the literature are fully or partially based on randomness in order to create the EB transmission schedule. In this paper, we initially show that the randomness can lead to a considerable probability of collisions, and, especially, of full collisions. Subsequently, we propose a novel autonomous EB scheduling method that eliminates collisions using a simple technique that does not increase the power consumption. To the best of our knowledge, our proposed method is the first non-centralized EB scheduling method that fully eliminates collisions, and this is guaranteed even if there are mobile nodes. To evaluate our method, we compare our proposal with recent and state-of-the-art non-centralized network-advertisement scheduling methods. Our evaluation does not consider only fixed topology networks, but also networks with mobile nodes, a scenario which has not been examined before. The results of our simulations demonstrate the superiority of our method in terms of joining time and energy consumption.


2020 ◽  
Vol 10 (2) ◽  
pp. 19
Author(s):  
Alfio Di Mauro ◽  
Hamed Fatemi ◽  
Jose Pineda de Gyvez ◽  
Luca Benini

Power management is a crucial concern in micro-controller platforms for the Internet of Things (IoT) edge. Many applications present a variable and difficult to predict workload profile, usually driven by external inputs. The dynamic tuning of power consumption to the application requirements is indeed a viable approach to save energy. In this paper, we propose the implementation of a power management strategy for a novel low-cost low-power heterogeneous dual-core SoC for IoT edge fabricated in 28 nm FD-SOI technology. Ss with more complex power management policies implemented on high-end application processors, we propose a power management strategy where the power mode is dynamically selected to ensure user-specified target idleness. We demonstrate that the dynamic power mode selection introduced by our power manager allows achieving more than 43% power consumption reduction with respect to static worst-case power mode selection, without any significant penalty in the performance of a running application.


1997 ◽  
Vol 07 (01) ◽  
pp. 17-30 ◽  
Author(s):  
An-Chang Deng

Power consumption is a primary concern for today's IC designers. However, determining an IC's power consumption is a difficult task, as consumption varies according to input stimulus conditions. This paper will focus on (1) the principal phenomena involved in the power consumption of CMOS circuits, (2) a brief survey of power estimation techniques, and (3) the effect of power-supply noise on circuit performance plus possible solutions to this problem.


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