New Failure Mode of Flip-Chip Solder Joints Related to the Metallization of an Organic Substrate

The effect of a heat spreader on the life of the solder joints for underfill-encapsulated, flip-chip packages is investigated through stress analyses and thermal cycling tests. An underfill with suitable mechanical properties is found to be able to prolong the fatigue life of the solder joints even in a package with a heat spreader and an alumina substrate. The delamination of the underfill from the chip is revealed as another critical failure mode for which the shape of the underfill fillet has a large effect.

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Failure mode analysis for the solder joints for the flip-chip light emitting diodes

2015 16th International Conference on Electronic Packaging Technology (ICEPT) ◽

10.1109/icept.2015.7236752 ◽

2015 ◽

Author(s):

Yang Liu ◽

Fenglian Sun ◽

Hao Zhang ◽

Tong Xin ◽

Guoqi Zhang

Keyword(s):

Failure Mode ◽

Flip Chip ◽

Light Emitting Diodes ◽

Solder Joints ◽

Mode Analysis ◽

Light Emitting ◽

Failure Mode Analysis

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Interfacial Morphology and Shear Deformation of Flip Chip Solder Joints

Journal of Materials Research ◽

10.1557/jmr.2000.0242 ◽

2000 ◽

Vol 15 (8) ◽

pp. 1679-1687 ◽

Cited By ~ 28

Author(s):

J. W. Jang ◽

C. Y. Liu ◽

P. G. Kim ◽

K. N. Tu ◽

A. K. Mal ◽

...

Keyword(s):

Shear Deformation ◽

Dielectric Layer ◽

Flip Chip ◽

Solder Joints ◽

Organic Substrate ◽

Failure Behavior ◽

Interfacial Morphology ◽

Solder Interconnects ◽

Solder Balls ◽

Electroless Ni

We examined the interfacial morphology and shear deformation of flip chip solder joints on an organic substrate (chip-on-board). The large differences in the coefficients of thermal expansion between the board and the chip resulted in bending of the 1-cm2 chip with a curvature of 57 ± 12 cm. The corner bump pads on the chip registered a relative misalignment of 10 μm with respect to those on the board, resulting in shear deformation of the solder joints. The mechanical properties of these solder joints were tested on samples made by sandwiching two Si chips with electroless Ni(P) as the under-bump metallization and 25 solder interconnects. Joints were sheared to failure. Fracture was found to occur along the solder/Ni3Sn4 interface. In addition, cracking and peeling damages of the SiO2 dielectric layer were observed in the layer around the solder balls, indicating that damage to the dielectric layer may have occurred prior to the fracture of the solder joints due to a large normal stress. The failure behavior of the solder joints is characterized by an approximate stress analysis.

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Interfacial reaction and failure mode analysis of the solder joints for flip-chip LED on ENIG and Cu-OSP surface finishes

Microelectronics Reliability ◽

10.1016/j.microrel.2015.05.005 ◽

2015 ◽

Vol 55 (8) ◽

pp. 1234-1240 ◽

Cited By ~ 7

Author(s):

Yang Liu ◽

Fenglian Sun ◽

Hao Zhang ◽

Tong Xin ◽

Cadmus A. Yuan ◽

...

Keyword(s):

Failure Mode ◽

Interfacial Reaction ◽

Flip Chip ◽

Solder Joints ◽

Mode Analysis ◽

Surface Finishes ◽

Failure Mode Analysis

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Thin-Die Flip Chip Physical-FA Process Flow

ISTFA 2002: Conference Proceedings from the 28th International Symposium for Testing and Failure Analysis ◽

10.31399/asm.cp.istfa2002p0189 ◽

2002 ◽

Author(s):

Andrew J. Komrowski ◽

N. S. Somcio ◽

Daniel J. D. Sullivan ◽

Charles R. Silvis ◽

Luis Curiel ◽

...

Keyword(s):

Sample Preparation ◽

Failure Analysis ◽

Flip Chip ◽

Semiconductor Industry ◽

Organic Substrate ◽

Fault Isolation ◽

Preparation Methods ◽

Chip Technology ◽

Isolation Test ◽

Sample Preparation Methods

Abstract The use of flip chip technology inside component packaging, so called flip chip in package (FCIP), is an increasingly common package type in the semiconductor industry because of high pin-counts, performance and reliability. Sample preparation methods and flows which enable physical failure analysis (PFA) of FCIP are thus in demand to characterize defects in die with these package types. As interconnect metallization schemes become more dense and complex, access to the backside silicon of a functional device also becomes important for fault isolation test purposes. To address these requirements, a detailed PFA flow is described which chronicles the sample preparation methods necessary to isolate a physical defect in the die of an organic-substrate FCIP.

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Rapid diagnosis of electromigration induced failure time of Pb-free flip chip solder joints by high resolution synchrotron radiation laminography

Applied Physics Letters ◽

10.1063/1.3628342 ◽

2011 ◽

Vol 99 (8) ◽

pp. 082114 ◽

Cited By ~ 17

Author(s):

Tian Tian ◽

Feng Xu ◽

Jung Kyu Han ◽

Daechul Choi ◽

Yin Cheng ◽

...

Keyword(s):

High Resolution ◽

Synchrotron Radiation ◽

Flip Chip ◽

Solder Joints ◽

Failure Time ◽

Rapid Diagnosis

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Crack Propagation Experiments on Flip Chip Solder Joints

MRS Proceedings ◽

10.1557/proc-515-227 ◽

1998 ◽

Vol 515 ◽

Cited By ~ 2

Author(s):

S. Wiese ◽

F. Feustel ◽

S. Rzepka ◽

E. Meusel

Keyword(s):

Crack Propagation ◽

Flip Chip ◽

Solder Joints ◽

Shear Loading ◽

Displacement Curve ◽

In Situ Experiments ◽

Propagation Experiment ◽

Crack Propagation Experiment ◽

Number Of Cycles ◽

Force Displacement

ABSTRACTThe paper presents crack propagation experiments on real flip chip specimens applied to reversible shear loading. Two specially designed micro testers will be introduced. The first tester provides very precise measurements of the force displacement hysteresis. The achieved resolutions have been I mN for force and 20 nm for displacement. The second micro tester works similar to the first one, but is designed for in-situ experiments inside the SEM. Since it needs to be very small in size it reaches only resolutions of 10 mN and 100nm, which is sufficient to achieve equivalence to the first tester. A cyclic triangular strain wave is used as load profile for the crack propagation experiment. The experiment was done with both machines applying equivalent specimens and load. The force displacement curve was recorded using the first micro mechanical tester. From those hysteresis, the force amplitude has been determined for every cycle. All force amplitudes are plotted versus the number of cycles in order to quantify the crack length. With the second tester, images were taken at every 10th … 100th cycle in order to locate the crack propagation. Finally both results have been linked together for a combined quatitive and spatial description of the crack propagation in flip chip solder joints.

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