Investigation of Leakage Current Mechanisms in La2O3/SiO2/4H-SiC MOS Capacitors with Varied SiO2 Thickness

2016 ◽  
Vol 45 (11) ◽  
pp. 5600-5605 ◽  
Author(s):  
Yucheng Wang ◽  
Renxu Jia ◽  
Yanli Zhao ◽  
Chengzhan Li ◽  
Yuming Zhang
RSC Advances ◽  
2015 ◽  
Vol 5 (102) ◽  
pp. 83837-83842 ◽  
Author(s):  
Sk Masiul Islam ◽  
K. Sarkar ◽  
P. Banerji ◽  
Kalyan Jyoti Sarkar ◽  
Biswajit Pal

Carrier transport vis-a-vis leakage current in GaAs MOS capacitors with various structures; quantum dot embedded devices show the lowest leakage.


Coatings ◽  
2019 ◽  
Vol 9 (11) ◽  
pp. 720
Author(s):  
He Guan ◽  
Shaoxi Wang

Au-Pt-Ti/high-k/n-InAlAs metal-oxide-semiconductor (MOS) capacitors with HfO2-Al2O3 laminated dielectric were fabricated. We found that a Schottky emission leakage mechanism dominates the low bias conditions and Fowler–Nordheim tunneling became the main leakage mechanism at high fields with reverse biased condition. The sample with HfO2 (4 m)/Al2O3 (8 nm) laminated dielectric shows a high barrier height ϕB of 1.66 eV at 30 °C which was extracted from the Schottky emission mechanism, and this can be explained by fewer In–O and As–O states on the interface, as detected by the X-ray photoelectron spectroscopy test. These effects result in HfO2 (4 m)/Al2O3 (8 nm)/n-InAlAs MOS-capacitors presenting a low leakage current density of below 1.8 × 10−7 A/cm2 from −3 to 0 V at 30 °C. It is demonstrated that the HfO2/Al2O3 laminated dielectric with a thicker Al2O3 film of 8 nm is an optimized design to be the high-k dielectric used in Au-Pt-Ti/HfO2-Al2O3/InAlAs MOS capacitor applications.


2014 ◽  
Vol 64 (6) ◽  
pp. 267-271
Author(s):  
J. T. Teherani ◽  
W. Chern ◽  
D. A. Antoniadis ◽  
J. L. Hoyt

2001 ◽  
Vol 714 ◽  
Author(s):  
François Mondon ◽  
Jacques Cluzel ◽  
Denis Blachier ◽  
Yves Morand ◽  
Laurent Martel ◽  
...  

ABSTRACTCopper penetration in thermal oxide was investigated using MOS capacitors by annealing at 450 °C and bias-temperature stress at 250 °C. Copper induces minority carrier generation lifetime decay and oxide leakage current increase. Degradation is enhanced by capacitor biasing, which confirms the role of Cu+ ions. The current-voltage characteristics are consistent with Poole-Frenkel model, showing that electron transport proceeds through traps created in the oxide bulk by copper. When a negative bias is applied, copper traps are removed from oxide near SiO2-Si interface and the leakage current is cancelled but the generation lifetime remains nil, copper contamination of silicon surface being not removed.None of these effects are observed when the copper gate is separated from oxide by a 10 nm TiN layer, proving that this material is an efficient barrier against copper diffusion at 450°C.


Nanomaterials ◽  
2021 ◽  
Vol 11 (12) ◽  
pp. 3443
Author(s):  
Jinyu Lu ◽  
Gang He ◽  
Jin Yan ◽  
Zhenxiang Dai ◽  
Ganhong Zheng ◽  
...  

In this paper, the effect of atomic layer deposition-derived laminated interlayer on the interface chemistry and transport characteristics of sputtering-deposited Sm2O3/InP gate stacks have been investigated systematically. Based on X-ray photoelectron spectroscopy (XPS) measurements, it can be noted that ALD-derived Al2O3 interface passivation layer significantly prevents the appearance of substrate diffusion oxides and substantially optimizes gate dielectric performance. The leakage current experimental results confirm that the Sm2O3/Al2O3/InP stacked gate dielectric structure exhibits a lower leakage current density than the other samples, reaching a value of 2.87 × 10−6 A/cm2. In addition, conductivity analysis shows that high-quality metal oxide semiconductor capacitors based on Sm2O3/Al2O3/InP gate stacks have the lowest interfacial density of states (Dit) value of 1.05 × 1013 cm−2 eV−1. The conduction mechanisms of the InP-based MOS capacitors at low temperatures are not yet known, and to further explore the electron transport in InP-based MOS capacitors with different stacked gate dielectric structures, we placed samples for leakage current measurements at low varying temperatures (77–227 K). Based on the measurement results, Sm2O3/Al2O3/InP stacked gate dielectric is a promising candidate for InP-based metal oxide semiconductor field-effect-transistor devices (MOSFET) in the future.


2011 ◽  
Vol 197-198 ◽  
pp. 1757-1765
Author(s):  
Tao Yu ◽  
Xue Mei Wu ◽  
Lan Jian Zhuge

HfTaO-based MOS capacitors with different top electrode (Ag、Au、Pt) were successfully fabricated by dual ion beam sputtering deposition (DIBSD). We presented the effect of different metal gate on the capacity, flat band voltage shift, leakage current and conduction mechanism. It has been found that the Pt-electrode capacitor exhibited the highest accumulation capacitance. In addition, the largest hysteresis loop in Pt/HfTaO/Si capacitor during the forward-and-reverse voltage sweeping from +2.5V to -2.5V was observed. The result indicates the presence of a large amount of fixed charges or oxygen vacancies exist in interface Pt/HfTaO, which is consistent with the prediction from Qf results. It is proved that even though Eotof the Pt-electrode capacitor is lower than that of the Ag, Au-electroded, and that of leakage current still has the smallest value at a high electric field due to Pt with a high enough work function Φms(Pt)=5.65eV.


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