Electrical Characterization of Copper Penetration Effects in the Gate Oxide of MOS Devices

2001 ◽  
Vol 714 ◽  
Author(s):  
François Mondon ◽  
Jacques Cluzel ◽  
Denis Blachier ◽  
Yves Morand ◽  
Laurent Martel ◽  
...  
Keyword(s):  
Leakage Current ◽  
Electrical Characterization ◽  
Current Increase ◽  
Mos Capacitors ◽  
Mos Devices ◽  
Thermal Oxide ◽  
Current Voltage ◽  
Bias Temperature Stress ◽  
Generation Lifetime

ABSTRACTCopper penetration in thermal oxide was investigated using MOS capacitors by annealing at 450 °C and bias-temperature stress at 250 °C. Copper induces minority carrier generation lifetime decay and oxide leakage current increase. Degradation is enhanced by capacitor biasing, which confirms the role of Cu+ ions. The current-voltage characteristics are consistent with Poole-Frenkel model, showing that electron transport proceeds through traps created in the oxide bulk by copper. When a negative bias is applied, copper traps are removed from oxide near SiO2-Si interface and the leakage current is cancelled but the generation lifetime remains nil, copper contamination of silicon surface being not removed.None of these effects are observed when the copper gate is separated from oxide by a 10 nm TiN layer, proving that this material is an efficient barrier against copper diffusion at 450°C.

Structural and Electrical Characterization of Si-Implanted TiN as a Diffusion Barrier for Cu Metallization

1995 ◽  
Vol 391 ◽  
Author(s):  
W.F. Mcarthur ◽  
K.M. Ring ◽  
K.L. Kavanagh
Keyword(s):  
Leakage Current ◽  
Diffusion Barrier ◽  
Depth Profiling ◽  
Electrical Characterization ◽  
Implantation Dose ◽  
Cu Metallization ◽  
Reverse Leakage Current ◽  
Transmission Electron ◽  
Current Voltage

AbstractThe feasibility of Si-implanted TiN as a diffusion barrier between Cu and Si was investigated. Barrier effectiveness was evaluated via reverse leakage current of Cu/TixSiyNz/Si diodes as a function of post-deposition annealing temperature and time, and was found to depend heavily on the film composition and microstructure. TiN implanted with Si28, l0keV, 5xl016ions/cm2 formed an amorphous ternary TixSiyNz layer whose performance as a barrier to Cu diffusion exceeded that of unimplanted, polycrystalline TiN. Results from current-voltage, transmission electron microscopy (TEM), and Auger depth profiling measurements will be presented. The relationship between Si-implantation dose, TixSiyNz structure and reverse leakage current of Cu/TixSiyNz/Si diodes will be discussed, along with implications as to the suitability of these structures in Cu metallization.

Improving Sensitivity of p-n Junction Temperature Sensor by Carrier Lifetime Modification

2008 ◽  
Vol 55-57 ◽  
pp. 517-520
Author(s):  
Amporn Poyai ◽  
E. Ratanaudomphisut ◽  
J. Supadech ◽  
N. Klunngien ◽  
C. Hruanan ◽  
...  
Keyword(s):  
Leakage Current ◽  
Temperature Sensor ◽  
Carrier Lifetime ◽  
Reverse Current ◽  
Junction Temperature ◽  
Carrier Generation ◽  
Current Voltage ◽  
Generation Lifetime

This paper presents the relation between the staring cobalt thickness with carrier generation lifetime, which effects to the sensitivity of p-n junction temperature sensor. The starting cobalt thickness of 12, 20 and 30nm have been used. The carrier generation lifetimes have been calculated from the reverse current-voltage (I-V) characteristics. The highest carrier generation lifetime has been obtained in the case of 12nm starting cobalt thickness. The highest sensitivity of p-n junction temperature sensor has also been observed from the case of 12nm starting cobalt thickness. The sensitivity has been calculated from the relation between leakage current versus temperature. The sensitivity of p-n junction temperature sensor can be improved by increasing carrier generation lifetime.

Extraction of Defect in Doping Silicon Wafer by Analyzing the Lifetime Profile Method

2008 ◽  
Vol 55-57 ◽  
pp. 765-768
Author(s):  
W. Pengchan ◽  
T. Phetchakul ◽  
Amporn Poyai
Keyword(s):  
Leakage Current ◽  
Current Density ◽  
Cmos Technology ◽  
In Doping ◽  
Current Voltage ◽  
Capacitance Voltage ◽  
Total Leakage ◽  
Implantation Process ◽  
Generation Lifetime ◽  
Key Parameter

The total leakage current in silicon p-n junction diodes compatible with 0.8 µm CMOS technology is investigated. The generation lifetime is a key parameter for the leakage current, which can be obtained from the current-voltage (I-V) and the capacitance-voltage (C-V) characteristics. As will be shown, the electrically active defect from ion implantation process generated in p-n junction can be extracted from the generation current density.

Interface defects detection and quantification on a Si/SiO2 structure

2018 ◽  
Vol 35 (1) ◽  
pp. 12-17
Author(s):  
Rawad Elias ◽  
Pierre Ziade ◽  
Roland Habchi
Keyword(s):  
Electrical Characterization ◽  
Power Devices ◽  
Content Type ◽  
Mos Devices ◽  
Interface Defects ◽  
Current Voltage ◽  
Silicon Based ◽  
The Hill ◽  
A Current

Purpose The purpose of this paper is to investigate and classify the defects on silicon-based power devices under extreme conditions. Design/methodology/approach Electrical characterization was performed on MOS devices to study their interface defects. The devices were subjected to a voltage or a current constraint to induce defects, and then measurements were done to detect the effects of those defects. Measurements include current voltage, capacitance and conductance characterization. The Hill–Coleman method was used to calculate the interface states density in each case. Findings It was found that most of the defects have energies within the upper band gap of the semiconductor. Originality value The method used in this paper allows the determination of any interface defects on a Si/SiO2 structure.

Evaluating Oxide Liner and Copper Barrier Integrity of Through-Silicon-Via by Electrical Characterization and Microanalysis

2013 ◽  
Vol 1559 ◽  
Author(s):  
Minrui Yu ◽  
Bharat Bhushan ◽  
Niranjan Kumar ◽  
Mun Kyu Park ◽  
John Hua ◽  
...  
Keyword(s):  
Leakage Current ◽  
Performance Enhancement ◽  
Electrical Characterization ◽  
Power Reduction ◽  
3D Integration ◽  
Through Silicon Via ◽  
Barrier Integrity ◽  
Current Voltage ◽  
Model Predictions ◽  
Capacitance Voltage

ABSTRACT3D integration enabled by through-silicon-via (TSV) allows continued performance enhancement and power reduction for semiconductor devices, even without further scaling. For TSV wafers with all Applied Materials unit processes, we evaluate the integrity of oxide liner and copper barrier by capacitance-voltage (C-V) and current-voltage (I-V) measurements, from which oxide capacitance, minimum TSV capacitance, and leakage current are extracted. The capacitance values match well with model predictions. The leakage data also demonstrate good wafer-scale uniformity. The liner and barrier quality are further verified with microanalysis techniques.

Improvement of SiO2/4H-SiC Interface Quality by Post-Oxidation Annealing in N2 at High-Temperatures

2016 ◽  
Vol 858 ◽  
pp. 627-630 ◽  
Author(s):  
Atthawut Chanthaphan ◽  
Yen Hung Cheng ◽  
Takuji Hosoi ◽  
Takayoshi Shimura ◽  
Heiji Watanabe
Keyword(s):  
Photoelectron Spectroscopy ◽  
Annealing Temperature ◽  
Electrical Characterization ◽  
Practical Method ◽  
Interface State ◽  
State Density ◽  
Interface Quality ◽  
Mos Capacitors ◽  
X Ray ◽  
Mos Devices

The efficient and practical method for SiO2/4H-SiC interface improvement using post-oxidation annealing (POA) in pure N2 ambient was studied by means of x-ray photoelectron spectroscopy (XPS) analysis and electrical characterization. SiC-MOS capacitors with slope-shaped thermal oxides were used to investigate optimal conditions for interface nitridation. It was found that the amount of nitrogen atoms incorporated into the interfaces increased when raised the annealing temperature up to 1400°C, and thin oxide (< 30 nm) was used. Furthermore, N2-POA at 1400°C was proven to be very promising as equivalent to NO-POA in terms of reduced interface state density of SiC-MOS devices.

Electrical Properties of Thermal Oxide on 3C-SiC Layers Grown on Silicon

2019 ◽  
Vol 963 ◽  
pp. 479-482
Author(s):  
Patrick Fiorenza ◽  
Giuseppe Greco ◽  
Salvatore di Franco ◽  
Filippo Giannazzo ◽  
Sylvain Monnoye ◽  
...  
Keyword(s):  
Electrical Properties ◽  
Positive Charge ◽  
Dielectric Breakdown ◽  
Extended Defects ◽  
Ideal Behavior ◽  
Mos Capacitors ◽  
Thermal Oxide ◽  
Nanoscale Characterization ◽  
The Ideal

In this paper, the electrical properties of a thermal oxide (SiO2) grown onto 3C-SiC layers on silicon were investigated, by monitoring the behavior of MOS capacitors. In particular, the growth rate of thermal SiO2 was dependent on the different surface roughness condition. However, independent of the roughness a high density of positive charge was detected. The sample having the smooth surface (subjected to CMP) showed a notably improved dielectric breakdown (BD) field. However, the best BD on macroscopic MOS capacitors was still far from the ideal behavior. Additional insights could be gained employing a nanoscale characterization that revealed the detrimental role of persisting extended defects in the semiconductor. In the semiconductor region far from extended defects the nanoscale BD kinetics was nearly ideal.

From Radiation Induced Leakage Current to Soft Breakdown in Irradiated MOS Devices With Ultrathin Gate Oxide

1999 ◽  
Vol 592 ◽  
Author(s):  
M. Ceschia ◽  
A. Paccagnella ◽  
A. Cester ◽  
G. Ghidini ◽  
J. Wyss
Keyword(s):  
Leakage Current ◽  
Ion Irradiation ◽  
High Energy ◽  
Oxide Semiconductor ◽  
Flat Band ◽  
Mos Capacitors ◽  
Mos Devices ◽  
Radiation Induced ◽  
High Energy Ions ◽  
Soft Breakdown

ABSTRACTMetal Oxide Semiconductor (MOS) capacitors with ultra-thin oxides have been irradiated with ionising particles (8 MeV electrons or Si, Ni, and Ag high energy ions), featuring various Linear Energy Transfer (LET) ranging over 4 orders of magnitude. Different oxide fields (Fbias) were applied during irradiation, ranging between flat-band and 3 MV/cm. We measured the DC Radiation Induced Leakage Current (RILC) at low fields (3-6 MV/cm) after electron or Si ion irradiation. RILC was the highest in devices biased at flat band during irradiation. In devices irradiated with higher LET ions (Ni and Ag) we observed the onset of Soft-Breakdown phenomena. Soft-Breakdown current increases with the oxide field applied during the stress.

Conduction Mechanism of Leakage Current in Thermal Oxide on 4H-SiC

2014 ◽  
Vol 778-780 ◽  
pp. 579-582 ◽  
Author(s):  
Mitsuru Sometani ◽  
Dai Okamoto ◽  
Shinsuke Harada ◽  
Hitoshi Ishimori ◽  
Shinji Takasu ◽  
...  
Keyword(s):  
Temperature Dependence ◽  
Leakage Current ◽  
Conduction Mechanism ◽  
Emission Current ◽  
Thermal Oxide ◽  
Current Voltage ◽  
Carrier Separation ◽  
Nordheim Tunneling

The conduction mechanism of the leakage current in thermal oxide on 4H-SiC was identified. The carrier separation current-voltage method clarified that electrons are the dominant carriers of the leakage current. The temperature dependence of the currentvoltage characteristics indicated that the conduction mechanism of the leakage current involved not only Fowler-Nordheim tunneling (FN) but also Poole-Frenkel (PF) emission. The PF emission current due to the existence of defects in the oxide increased with temperature.

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