Optimization of board-level thermomechanical reliability of high performance flip-chip package assembly

2008 ◽  
Vol 85 (4) ◽  
pp. 659-664 ◽  
Author(s):  
Tong Hong Wang ◽  
Ching-Chun Wang ◽  
Yi-Shao Lai ◽  
Kuo-Chin Chang ◽  
Chien-Hsun Lee
Author(s):  
Nokibul Islam

The current automotive market for the IC (integrated circuit) packaging industry has grown significantly due to the increasing need for automation and higher performance in vehicles. These changes in the automotive market will enable cars to be more reliable and intelligent. To address the increasingly complex demands of the automotive market, the semiconductor packaging industry is shifting its focus to prioritize the development of advanced packages for next generation automotive market requirements. Automotive IC's are traditionally wirebond packages. Due to the increasing complexity and higher performance requirements of automotive applications, the packaging industry is moving towards high performance flip chip packages for automotive infotainment, GPS, and radar applications. In this study a comprehensive view of the changing packaging landscape from traditional wirebond to flip chip interconnect to advanced fan-out wafer level packages will be discussed. The pros and cons of each packaging technology will be examined Packaging roadmap details will be discussed along with assembly process information, determining the right BOM (bill of materials), cost data, and extensive package and board level reliability.


2018 ◽  
Vol 2018 (1) ◽  
pp. 000452-000457
Author(s):  
Nokibul Islam ◽  
HC Choi

Abstract The current automotive market for the integrated circuit (IC) packaging industry has grown significantly due to the increasing need for automation and higher performance in vehicles. These changes in the automotive market will enable cars to be more reliable and intelligent. To address the increasingly complex demands of the automotive market, the semiconductor packaging industry is shifting its focus to prioritize the development of advanced packages for next generation automotive market requirements. Automotive IC's are traditionally wirebond packages. Due to the increasing complexity and higher performance requirements of automotive applications, the packaging industry is moving towards high performance flip chip packages for automotive infotainment, GPS, and radar applications. In this study, a comprehensive view of the evolving packaging landscape from traditional wirebond to flip chip interconnect to advanced fan-out wafer level packages will be discussed. The pros and cons of each packaging technology will be examined. Packaging roadmap details will be discussed along with assembly process information, determining the right bill of materials (BOM), and extensive package and board level reliability (BLR) including grade 1 and grade 0 reliability data will be discussed.


Author(s):  
Nokibul Islam ◽  
Miguel Jimarez ◽  
Ahmer Syed ◽  
TaeKyeong Hwang ◽  
JaeYun Gim ◽  
...  

Flip Chip (FC) technology has now become the mainstream solution for high performance packages. From commercial gaming machines to high reliability servers, the FC package is gaining more market share over traditional packaging technologies, such as wire bond. Extensive research has been carried out to make the flip chip more robust, smaller foot prints, and excellent performance. FC packages are fabricated typically in two main configurations. Bare die FC packages leave the non active side of the die exposed. This allows the customer to apply their preferred heat dissipation scheme during board level attach. Lidded FC packages use a metallic lid attached to the die. Bare die package can be further subdivided into bare die underfilled package and bare die flip chip molded ball grid array (FCmBGA) package. Each of these packaging configurations has advantages as well as disadvantages. FCmBGA uses molding compound or EMC instead of capillary underfill, to protect FC die, and eliminate the need for a lid. Package warpage reduced a lot by adding a lid with the bare die FC package. However, the package and board level reliability for the above package types are still debatable. In this study test vehicles with three package types with bumps and BGAs are daisy chain to measure in situ data during accelerated tests. Impact of standard vs. low CTE (coefficient of thermal expansion) core substrate, accelerated temperature cycle conditions (temperature cycle condition “B”, “H”, and “J” according to JEDEC), and package level vs. package mounted on the board level reliability will be investigated. Comprehensive reliability data will help to select the right package type for next generation large die large body flip chip application.


2007 ◽  
Vol 30 (1) ◽  
pp. 38-43 ◽  
Author(s):  
Soonwan Chung ◽  
Zhenming Tang ◽  
Seungbae Park
Keyword(s):  

1995 ◽  
Vol 7 (5) ◽  
pp. 476-478 ◽  
Author(s):  
D. Leclerc ◽  
P. Brosson ◽  
F. Pommereau ◽  
R. Ngo ◽  
P. Doussiere ◽  
...  

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